This is an old revision of the document!
Table of Contents
ZoRC, Z80+oscillator+RAM+CPLD (Exploratory)
Introduction
This is a hand-wired design derived from ZRCC where the design is further simplified by eliminate the compact flash disk and upgrade the RAM to 512K so the CP/M file system can be stored in RAMdisk.
Features
- Z80 overclocked to 22MHz
- 512K RAM, 16 banks of 32K
- EPM7064S CPLD
- 22MHz oscillator
Design Files
Schematic
CPLD equations
Bootstrap CPLD ROM
