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--- boards:sbc:tiny68k:tiny68k_rev2 [2017/12/15 23:25]
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+++ boards:sbc:tiny68k:tiny68k_rev2 [2017/12/21 11:43] (current)
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 ====== Tiny68K, 68000 SBC, Rev 2 ======
+This page only contains updated information specific to rev 2 pc board. For general description of Tiny68K, please refer to [[:boards:sbc:tiny68k|this page]].
 ===== Introduction =====
-Tiny68K is a high-performance yet low-cost single board computer based on the Motorola 68000. Tiny68K has two unusual features:
+Tiny68K is a high-performance yet low-cost single board computer based on the Motorola 68000. Revision 2 of Tiny68K has the following changes:
+  * The Compact Flash interface of rev 1 is marginal. It may not work with faster CF drives due to ground noises generated by faster CF drives. Rev 2 design added isolation resistors to the data line, RC circuitry to the nIORD control line, and pull up resistors to the upper half of the 16-bit data line
+  * A 'warm boot' button is added that will generate a non-maskable interrupt to the 68000 when pressed.
+  * Add a real-time clock based on DS1302 that is backed up with a super capacitor.
+Figure below shows an assembled rev 2 Tiny68K with annotations showing the changes from rev1 design.
+[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?tok=de4d25&media=https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/boards/sbc/tiny68k/tiny68k_rev2/tiny68k-rev2_changes_copy.jpg|{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/boards/sbc/tiny68k/tiny68k_rev2/tiny68k-rev2_changes_copy.jpg?direct&600x371|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_boards_sbc_tiny68k_tiny68k_rev2_tiny68k-rev2_changes_copy.jpg}}]]
+===== Rev 2 Design Files =====
+{{:boards:sbc:tiny68k:tiny68k_rev2:tiny68k_scm_rev2.pdf|schematic, }}  the schematic and board layout tools are IVEX's WinBoard and WinDraft (ver 2.05)
+gerber {{:boards:sbc:tiny68k:tiny68k_rev2:tiny68k_r2.zip|photo plots}}, pc boards were manufactured by SeeedStudio
+Part list
+Altera EPM7128 {{:boards:sbc:tiny68k:tiny68k_rev2:rtc_en_0_wait.zip|design files}}. Designs are created in Quartus 8.1, should be compatible with later version of Quartus. Designs are entirely in schematics. {{:boards:sbc:tiny68k:tiny68k_rev2:tiny68k_cpld_rtc_en_0_wait.pdf|Schematic}}  in PDF format. {{:boards:sbc:tiny68k:tiny68k_rev2:tiny68k_cpld_program_binary.zip|Programming binary}}  in .pof format.
-  * The entire 16-megabyte memory space of 68000 (except the top 32Kbyte of I/O space) is filled with RAM,
+Tiny68K {{:boards:sbc:tiny68k:tiny68k_rev2:t68kbug_r07.zip|Monitor debugger}}. The software is developed in the EASy68K tool chain. File with .bin extension is the programming binary for serial EEPROM programmer (CH341).
-  * The boot software residesin a 32Kbyte serial flash that is copied into the lowest 32Kbyte of the DRAM when powered up or with a reset. The RAM-resident boot software can be modified just like any data in RAM but is overwritten on the next power cycle or with a reset.
-Figure below shows an assembled Tiny68K.
+===== Board build procedures =====