ZZRCC Bootstrap ROM

This is the listing of the small bootstrap ROM inside of EPM7032S CPLD

---

;12/5/20
;32-byte ROM inside CPLD
;check for CF disk not busy, then read the master boot record to 0xB000
;  execute the program starting from 0xB000
CFdata       equ 010h        ;CF data register
CFerr        equ 011h        ;CF error reg
CFsectcnt         equ 012h        ;CF sector count reg
CF07         equ 013h       ;CF LA0-7
CF815        equ 014h           ;CF LA8-15
CF1623       equ 015h           ;CF LA16-23
CF2427       equ 016h           ;CF LA24-27
CFstat       equ 017h           ;CF status/command reg

    org 0
    nop
    nop
    nop
    ld hl,0b000h    ;bootstrap code starts from 0xb000
; check for disk not busy
readbsy:
    in a,(CFstat)    ; read CF status
    and 80h        ; mask off all except busy bit
    jr nz,readbsy
;reg A is already 0
    ld b,a        ;make reg B zero
;; do not need to set up sector/track and sector count because
;;   they are set by default after reset
;    out (CF1623),a    ; track 0
;    out (CF815),a
;    inc a        ;master boot sector is sector 1
;    out (CF07),a    ;read master boot sector (sector 1)
;    ld c,CFdata    ; reg C points to CF data reg
;    out (CFsectcnt),a    ; write to sector count with 1

    ld a,20h        ; read sector command
    out (CFstat),a    ; issue the read sector command
chkdrq:
    in a,(CFstat)    ; check data request bit set before write CF data
    and 8        ; bit 3 is DRQ, wait for it to set
    jr z,chkdrq

    inir        ;z80 read 256 bytes
    jp 0b000h         ;execute loaded program

    end