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boards:sbc:sbc_v2:start [2018/04/26 23:44] b1ackmai1er [Board] |
boards:sbc:sbc_v2:start [2020/12/02 08:39] (current) b1ackmai1er [SBC V2] |
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The SBC V2 is a Zilog Z80 processor board. It's a 100x160mm board that is capable of functioning both as a standalone SBC or as attached to the ECB bus. | The SBC V2 is a Zilog Z80 processor board. It's a 100x160mm board that is capable of functioning both as a standalone SBC or as attached to the ECB bus. | ||
+ | Previously known as the N8VEM SBC, development began in 2006 wth V1 and is currently still in development. | ||
- | ===== Features ===== | + | For most people, the [[: |
- | * 4Mhz Zilog Z80 CPU | + | |{{https://www.retrobrewcomputers.org// |
- | * Up to 512Kb paged SRAM (: Add link to the paging description) | + | |[[: |
- | * Up to 1Mb EPROM or FLASH ROM. | + | |
- | * Serial Interface (16550 Uart) | + | |
- | * Parallel interface (8255), can be extended to support IDE interface via small board | + | |
- | * Real Time Clock (DS1302) | + | |
- | * Battery backup for RTC and SRAM. | + | |
- | * Standard ECB bus interface | + | |
- | * Standard PC drive connector power supply interface using +5V only | + | |
- | * Reset button with external connector | + | |
- | * Status LED | + | |
- | ===== Pictures ===== | + | \\ |
- | {{https:// | ||
- | ===== Board ===== | + | ===== Features |
- | The latest SBC V2 schematic is available here: {{: | + | * 4Mhz+ Zilog Z80 CPU. |
+ | * Up to 512Kb paged SRAM. | ||
+ | * Up to 1Mb EPROM or 512Kb Flash ROM. | ||
+ | * Serial Interface. | ||
+ | * IDE interface. | ||
+ | * Real Time Clock. | ||
+ | * Onboard sound. | ||
+ | * Battery backup for RTC and SRAM via super capacitor. | ||
+ | * Standard ECB bus interface. | ||
+ | * +5V power connector for Single Board Computer operation. | ||
+ | * Reset button. | ||
+ | * Status LED. | ||
- | Also, here's the board' | ||
- | Kicad files for board manufacture: | + | ===== Software Support ===== |
- | [[https:// | + | [[:software:firmwareos:romwbw: |
+ | * CP/M / ZSDOS | ||
+ | * RAM & ROM disk support. | ||
+ | * ROM based BASIC, FORTH and Monitor. | ||
+ | * Prebuild disk images | ||
- | ===== Jumper Settings ===== | + | ROMWBW Eurocard expansion board driver support: |
- | The following table outlines the correct jumper settings for the SBC V2 board: | + | * RAMFLOPPY |
+ | * VDU | ||
+ | * CVDU | ||
+ | * VGA3 | ||
+ | * Zilog Peripherals | ||
+ | * USB FIFO | ||
+ | * Disk I/O | ||
+ | * 4PIO | ||
+ | * SCG | ||
+ | * DSKY | ||
+ | * DUAL SD CARD | ||
+ | * MF-PIC | ||
- | ^Board Reference^Jumper Description^ | ||
- | | JP1| Battery backup| | ||
- | |JP2|One bit input port|X| | ||
- | |K1|U2 EPROM chip pins (32-pin or 28-pin)|X *| | ||
- | | | ||
- | |K2|UART side hardware handshaking (DSR, CTS)|X *| |DSR (this should be paired with K3 - DTR) - default| | ||
- | | | ||
- | |K3|UART side hardware handshaking (DTR, RTS)|X *| |DTR (this should be paired with K2 - DSR) - default| | ||
- | | | ||
- | |K4|Serial side hardware handshaking (DSR, CTS)|X *| |DSR (this should be paired with K5 - DTR) - default| | ||
- | | | ||
- | |K5|Serial side hardware handshaking (DTR, RTS)|X *| |DTR (this should be paired with K4 - DSR) - default| | ||
- | | | ||
- | |K6|U2 chip type (27C080 EPROM, 29C040 flash)|X *| | ||
- | | | ||
- | |K7|U23 SRAM (512K or 128K)|X *| |512K chip used in U23 - default| | ||
- | | | ||
- | |K8|U2 chip type (27C080 EPROM, 29C040 flash)|X *| | ||
- | | | ||
- | |K9|Parallel Port power control (pin 25)|X *| | ||
- | | | ||
- | |K10|MCPL (Memory Page Config Latched)|X *| |32K upper RAM fixed/32K lower RAM switchable memory map - default| | ||
- | | | ||
- | |K11|MCPL (Memory Page Config Latched)|X *| |32K upper RAM fixed/32K lower RAM switchable memory map - default| | ||
- | | | ||
- | |K12|Bus Interrupt (pin A23)|X *| | ||
- | | | ||
- | |K13|ECB/ | ||
- | | | ||
- | * = default setting | + | ====== Version History ====== |
- | ===== I/O Addresses ===== | + | ^Version^Details^Key feature| |
+ | |[[: | ||
+ | |[[: | ||
+ | |[[: | ||
+ | |[[: | ||
- | The SBC V2 board uses addresses 60h - 7Fh for itself, and anything else goes to ECB. | + | \\ |
- | ^I/O Address^Aliases^Description| | ||
- | |60h-63h|64h-67h|8255 PPI| | ||
- | |68h-6Fh| | ||
- | |70h|71h|RTC| | ||
- | |78h|79h|RAM page register| | ||
- | |7Ch|7Eh|ROM enable/page register| | ||
- | The original ECB Disk IO board uses addresses 20h-3Fh. In the ECB Disk IO V3 board the I/O range is configurable to any 32-bytes block, with 20h-3Fh being the recommended default (and that's the default configuration of RomWBW firmware). The more detailed port information is here: ([[http:// | ||
- | The PropIO board uses 8 I/O addresses range, with the first Propeller (one that handles keyboard and VGA) using the first 4 addresses and the second propeller using the next 4 addresses. The I/O address can be configured to any 8-bytes block using P5 jumper block, but apparently the recommended default is 40h-47h (Jumpers setting: 10111 - 1 = Jumper In [present], 0 = Jumper Out [absent]). | ||
- | The ECB SCG board also uses 8 I/O addresses range, configurable using P20 jumper block. The default configuration is 50h- 58h (P20 jumper settings: 10101). | ||
- | The ECB Zilog Peripherals board uses 16 I/O addresses, configurable using jumpers SW1-SW4. It looks like the recommended default is 10h-1Fh (see "Board Address" | ||
- | The ECB VDU board uses addresses 0F0h-0F7h (: Double-check this address range). | ||
- | The uPD7220 board uses 16 I/O addresses, and it looks that the recommended address range is 80h-8Fh. | ||
- | The ECB ColorVDU board can be jumpered for any 16 I/O addresses. It is jumpered for addresses 0E0h-0EFh at present. | ||
- | Some additional notes regarding I/O addresses: | ||
- | |||
- | | \\ // | ||
- | | \\ //__Douglas W. Goodall, 5:36 pm on Dec 30, 2012__ \\ You can't actually reserve 2/16ths of all the possible I/O addresses, but we can note that these are the preferred addresses for integrating your boards, and at least cause builders to take this into account when they are integrating their own systems. I will try to follow that recommendation, | ||
- | |||
- | ===== Serial Cable Instructions ===== | ||
- | |||
- | The SBC V2 doesn' | ||
- | |||
- | First, you must build a cable with an IDC-10 plug on one end (plastic rectangular connector with 2 rows of 5 pins) and a female DE-9 plug (ie. a serial port plug) on the other end. | ||
- | |||
- | The female DE-9 plug is what you will plug into the serial port of your host computer. Serial ports (on the back of the computer) are male ports (ie. they have pins), so the plug at the end of this cable must be a female plug (they have holes). It's not recommended to use accessory serial cables to make this connection (such as null modem cables, etc.). This is because many such cables are wired for specific applications, | ||
- | |||
- | The following cable layout shows what is being connected where in this cable: | ||
- | |||
- | ^IDC-10 side^DE-9 side| | ||
- | |2|4| | ||
- | |3|3| | ||
- | |5|2| | ||
- | |7|6| | ||
- | |9|5| | ||
- | |||
- | Pin 1 on the IDC plug is marked with an embossed triangle on the plug, and this pin corresponds to pin 1 on the pcb which is marked with a square solder hole (at the lower-right most position of the plug on the SBC V2 pcb). The pins on the DE-9 plug are usually marked right on the plug itself in tiny numbers. Strip some wires and solder away. Instead of stripping wires and soldering manually, you can also use ribbon cable and special " | ||
- | |||
- | Always double and triple check where you’re soldering something before you solder it. When you’ve built your cable, use your multimeter to check connectivity between each pin on the IDC-10 side and the DE-9 side according to the arrangement above to make sure you got it right. | ||
- | |||
- | In order to test connections in a plug you cannot stick the multimeter lead into the hole (because it will not fit). Instead, take a spare piece of wire, stick it into the hole for the pin you want to test, and then touch the multimeter lead to that wire. | ||
- | |||
- | ===== Parts List ===== | ||
- | |||
- | {{: | ||
- | |||
- | ===== Software ===== | ||
- | |||
- | [[https:// | ||
- | |||
- | ===== Changes from V1 ===== | ||
- | |||
- | The V2 is upward compatible. The main difference is the added jumpers to allow 48k/16k memory mapping as an alternate to 32k/32k. All of the V1 software will run on the V2 with default jumpers. | ||
- | |||
- | The V2 board has major corrections to the external Bus Master logic to support DMA. The V1 board is not able to support DMA. Since there are no add-on boards which have a DMA controller, this circuit update has never been tested or used. | ||
- | |||
- | The serial interface is jumper configurable to support DTR/DSR protocol (V1 compatible), | ||
- | |||
- | There is an DS1210 on the V2 board to provide 512k SRAM battery backup. The V1 does not have this capability. The RTC SRAM is battery backed on both boards. | ||
- | |||
- | There is an option jumper on the Parallel Interface connector to strap pin 25 to either GND or +5v. On the V1 board this pin is tied to GND. | ||
- | |||
- | The V1 board has a Power On LED; the V2 board has a HALT(red)/ | ||
- | |||
- | If at some future time you want one of the new goodies, then you might consider an upgrade. As an alternate upgrade you might look at the Home Computer with the Z180. It is still in the early shakedown stages; but it is a much larger board. | ||
- | |||
- | \\ | ||