Table of Contents
Engineering Changes for CPLD6502, rev0
There are two errors on rev0 CPLD6502 pc board. This is the engineering changes to correct these errors.
7-Segment display, D6, wiring errors
Cut A, jumper A, cut B, jumper B
RAM output enable, write enable, chip select wiring errors
Cut C, jumper C
Separate Flash output enable and chip select
Cut D, jumper D
2N2222 Footprint as layed out on PCB
