The original board design included:

• 4 Zilog PIO's.
• 8 i/o ports on 4 headers.
• Full Z80 interrupt mode 2 support.

Updated design to include the following changes:

• Correction for inverted ground and power plane.
• PCF8584 I2C controller.
• Two I2C pin header connector.
• Reset pin header connector.
• On board socket for 24LC512 flash.
• Onboard socket for DS1307 RTC with battery connection header.
• Jumpers to connect PCF8584 and DS1307 outputs to PIO #3
• Additional power and ground connectors to i/o port headers.

Status:

• Untested, boards ordered 28-Feb-2021
• Board received (I2Cb), construction and testing commenced.
  • There are some missing silkscreen details. Corrected on version c
  • IC7 inputs (pin 2-3, 13-14) are swapped due to Kicad symbols changes. Corrected on version c
  • IC16 pin 18 should be connected to VCC not GND for correct address decoding. Corrected on version c
  • Pullups R9, R10, R11 changed from 4K7 to 1K. Corrected in version C
  • Reset connector P8 is effectively connected to /M1 not RESET.. Corrected in version c
  • /RST on PCF8584 is connect to /M1 not /RESET. Corrected in version c
  • CE-PIO1 & CE-PIO2 were swapped. Corrected in version c
  • First I2C bus output seen 17/4/2021! … but doesn't do anything yet.
  • Added pin description on silkscreen.
  • Successfully read data off 24LC512.
  • Removed /WR qualification on IC15
  • Allow more space for crystal, shrouded port connectors.
  • Change top layer to vcc plane for better power distribution.
  • Gate /WR with /CS to meet PCF8584 Z80 configuration requirements.
  • Version C committed including above changes

Kicad files can be found here but may not be the most recent.

Current revision is ECB-4PIO-I2Cc

Gallery

The Z80 PIO I/O address range is selected by pin header block J1 and will select a 16 port address range.

Address line A7 through A4 are configurable where a jumper will select a “0” and no jumper is a “1”.

Example: Selecting address block A0h-AFh

The PCF8584 I/O address range is selected by pin header J2 an will select a 2 port address range.

Address lines A7 through A2 are configurable where a jumper will select a “1” and no jumper is a “0”.

Note this is the reverse notation to the PIO I/O addressing.

Example: Selecting address block F0h-F1h

24LC512 devices are access on the I2C bus by first issuing a control byte. The control byte consists if a device identifier (D), the device address (A) and a bit (B) to indicate if a read or write operation (O) is intended.

So accessing a device requires sending a bye in the following sequence: DDDDAAAO

AT25LC512

For 24LC512 the device identifier D is 1010, device address is 000-111 and O is set based on a read 1 or write 0.

The onboard 24LC512 has a default device address of 000, with an alternate address 011 selectable through solder jumper JP1.

The control byte for the onboard 24LC512 is:

Note that changing the 24LC512 to the alternate address using J1 requires the 1-2 solder link to be cut otherwise a short between +5V and ground will occur.

DS1307

For the DS1307 the device identifier D is 1101, device address A is 000 - only one device is supported on the bus, and O is set based on a read 1 or write 0.

The control byte for the onboard DS1307 is:

Sample test code: https://www.eevblog.com/forum/projects/z80lt-gtpcf8584-i2c-interface-problem/

I2C driver code: https://github.com/ncb85/utilis-and-examples/tree/master/cpm_i2c

6809 Interface: https://www.aslak.net/index.php/2013/07/18/i2c-on-a-6809-computer-and-a-mini-review-of-a-logic-analyser/

Understanding the I2C Bus - Texas Instruments: https://www.ti.com/lit/an/slva704/slva704.pdf

Linux C driver: https://code.woboq.org/linux/linux/drivers/i2c/algos/i2c-algo-pcf.c.html

• Black solder mask PCBs are terrible for development debugging. Very hard to see traces.
• Size of pullup resistors is important on open collector outputs. There is a huge difference in rise time between 1K and 4K7 pullups.
• Make provisions for I2C device and bus timeouts to avoid lockups.
• Do a hard reset between each software test to ensure consistent results. Exiting in a known state is important.
• Software control of hard reset is desirable as soft reset does guarantee consistent results.