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I have been thinking about what to do
with that other side. I did some initial design.
There is a part I have been working with that has an interrupt feature. When you write the last byte (from one side) or the second to the last byte (from the other) it is a way of sending interrupt requests back and forth to indicate something has changed. I was thinking the interrupt request output on the slave Z80 side would be hooked to the Z80's reset line so that when you wrote the last byte, the slave would come out of reset and begin booting from the newly loaded dual ported ram. And when the slave Z80 was done working and wanted to give up, he could acknowledge the interrupt and go back into reset. That seemed to be just sooo elegant to me. This part comes in 64K and also in smaller chunks such as 1k. If you wanted to build a serious multi-core machine, you could arrange things so that a master would see multiple slaves as small windows in the memory space, perhaps 1K, and it would only cost the master 16K of memory map to control 16 slaves. If the master has memory pages, you could potentially map the interfaces on an alternate page and the shared windows would not be detracting from CP/M's normal TPA size. If you are interested in my design, I have some documents and preliminary interface code I wrote. Douglas On 2/24/2013 4:20 PM, Daniel Palmer wrote:
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