Re: [N8VEM: 14648] 68008 SBC

[Douglas Goodall <douglas...@mac.com>]

Al & friends,

First let me say, I don't know how to program  FPGA's, but I understand they are marvelous and can be magically programmed to emulate
just about anything. I have seen a Spartan set up with an Arduino program. Weird and wonderful I think. I wouldn't doubt that one could 
emulate an entire SBC with other components only used to level shift required emulated peripherals.

The problem I have with the use of FPGA's is twofold.

The first is that we are used to debugging our boards by logically following the flow of data from it's origin through the desired result.

Clock chip wiggles, clock input to CPU wiggles, ROM interfaces wiggles, A0, RD & CE...

With the FPGA, I believe the emulated functions don't expose the signals we often use to determine the flow of logical functions across
the various IC's.

Secondly, I have had trouble in the past with the exact emulation of the discrete parts. Here is what I noticed...

I was debugging Concurrent DOS running on the PS/2 model 30. Although the machine was supposed to be a PC  (no MCA), the 
operating system was crashing immediately and it was not obvious why. It also wasn't clear how to apply a logic analyzer to see what
was going on.

What I eventually determined was that the emulation of the PC in the gate array was not the same  as the motherboard built with the discrete parts.

Here is an example of what I saw...

Normally when a motherboard is made of discrete parts, you can interleave access to various parts during initialization and everything still
works fine. Lets say you have to send 20 bytes to a chip to initialize it. In a single threaded system without interrupts, you would send the
sequence of bytes one after the other without interruption. In the case of the PS/2 30, IBM depended on this. Within the emulation, once you
began a sequence with a specific part of the emulation, you had to complete it before going on to something else. In DOS this is easy enough 
to do.

But in an interrupt rich environment, it is very possible to be in the middle of a transaction with a chip, when an interrupt hits and the ISR
begins querying other chips to identify the interrupt cause. In the PS/2 30, this caused a disruption of the internal state machines within the 
gate array, and the emulation of the motherboard went into undefined states.

I realized things have come a long way since then, but I am still nervous about the extent to which the emulated parts are actually autonomous
within the functioning of the gate array.

What I took away from this was a fear that should this sort of thing happen, it is difficult or impossible to diagnose and fix.

That is my experience for what it is worth.

Also part of the charm of what we do is use the vintage parts, and because we are operating at vintage speeds, the type of test equipment we need
to buy are inexpensive.

Douglas Goodall


On Sep 16, 2012, at 5:26 PM, ..I'd rather be coding ASM! <uri...@deviate.fi> wrote:

> 
> This is mostly a tyre-kicking exercise.
> 
> I keep watching (and playing) around with the N8VEM systems I've built (and love!) and a few others such as the V6Z80P which has a whopping great FPGA in the middle and a 20Mhz Z80. The V6Z80P is a wonderous machine. it has VGA+AV out, logically a chipset close to an Amiga ECS system with a blitter, 512kb ram, 512kb video ram, 128kb audio ram, 4-channel sterreo 8bit sound etc.
> 
> I've often been a bit torn with how impressive some of the FPGA designs are yet how enjoyable the non-FPGA's are for their simplicity and ease of understanding balanced with obtainability of chips.
> 
> I was wondering, if people are thinking about using FPGA's for various "Advanced" designs, and other "complex chips", perhaps there should be a similar service to the "Here is your blank PCB" that Andrew/Doug/Sergey/$REST graciously provide where FPGA's are distributed on a mini-carrier board and have a community designed firmware update based upon a very small number of reference designs. Ie. Your v1SP3 carrier chip/board can be used with this, that the other SBC project with different firmware.
> 
> For instance, say it was chosen that the Spartan-3 was to be the "common" FPGA used on a lot of projects. The chip is distributed at near cost+labour on a carrier board that can go onto the N8VEM project boards and there is for this small number of reference designs a simple serial programming method that hobbyists can use to reconfigure the FPGA as updates become available?
> 
> I've been thinking along these lines with the 68040SBC project that uses the QUICC chips and thinking "I'd desperately love to be able to build one of these but don't have the equipment to be able to attach one to the board."
> 
> So.. thoughts people? Perhaps a mini-board with the FPGA on it and a common set of pins underneath that can be socketed for break-out? I'm still not overly thrilled with the concept of FPGA's, but some projects are limited without custom ASIC's as many computers were with them even in the early 80's. (Spectrum ULA, various DEC J-11's when they moved from bitsliced processors ..etc).
> 
> Al.
> 
> 
> -- 
> --
> Al Boyanich
> adb -w -P "world> " -k /dev/meta/galaxy/ksyms /dev/god/brain
> 
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