Re: Disk I/O IDE up and running

[lynchaj <lyn...@yahoo.com>]

On Feb 7, 7:09 am, HD64180 <Harrma...@t-online.de> wrote:
> Hello Andrew,
>
> On 7 Feb., 12:48, lynchaj <lyn...@yahoo.com> wrote:
>
> > Hi Rich!  Thanks!  I uploaded a zip file to the wiki in the new "TP
> > development files" which is a backup of my entire TASM301 directory.
> > All the files from all the TestPrototype and N8VEM related are
> > included.   There are a number of DiskIO related files in the 04_boot
> > subdirectory.  I hope this helps.  There is a lot of junk in those
> > directories but there may be something useful as well.
>
> > Thanks and have a nice day!
>
> > Andrew Lynch
>
> i try to Time the Disk IO Board with a Floppy Drive and the Motor
> could also turn on and off and also the Drive-Select.
>
> I my search the good Floppy Drive TEAC 55 GR in my Chaos Room.
> This time a have a Panasonic JU-475-2 , JU-257 or a Combo TEAC 505.
>
> For the Test with the IDE, I must still search for a suitable Hard-
> Drive.
>
> Thank you!
> Have a nice day!
>
> Rolf

Hi Rolf!  Thanks!  Those are some really nice floppy disk drives and I
recommend both of them.  However for initial testing I would use the
DSDD models rather than the HD models.  You can use HD but you'll need
to set the "mini" parameter to push the i8272 into 8MHz mode from
4MHz.  You need the higher speed to deal with the 500 Kbps data
stream.  I would do all your initial testing with 250Kbps DSDD drives
to make sure the i8272 mechanics are working before using 500Kbps DSHD
drives.  You can place both the TEAC FD55GFR and Panasonic JU475 into
DSQD mode and use the 250Kbps data stream.  The disk monitor software
should be able to deal with those pretty easily.  There are
instructions on the internet on how to jumper the TEAC and Panasonic
drives into DSQD mode.

A couple of points of caution though; first if you are using TP-FDC-
B.asm you'll need to add to the code to set the latch bits #6 and #7
for the FDC interface pins 2 and 34.  The current code does not set
those bits so you'll need to go through and anywhere the latch is
modified ensure that the last two bits are set high.  Second, I would
use your RAM monitor and logic probe to read and write check the i8272
MSR, latch port, FDMA setting, etc.  Please ensure those are working
before launching on using the disk monitor.  The disk monitor assumes
the devices are working and if not will give unpredictable responses.

The good news is that if you got the drive selects and motor pins on
the latch working then you know some parts of the Disk IO FDC logic
are working.  I would try feeding the i8272 MSR some commands directly
from the RAM monitor and check its results.  The datasheet has all the
commands and with a little experimentation you can get it to respond.
I recall having good luck with the "sense interrupt status" command
because the i8272 can accept the command, process it, and return
results fairly directly without manipulating the actual drive
hardware.  If you get results other than $FF from the MSR then you are
probably good to proceed on to other testing.

Thanks and have a nice day!

Andrew Lynch

S