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Arduino lab tool wrapped-around a SP0256 to reverse engineer an unobtainium SPR000 [message #10745 is a reply to message #10720] Wed, 01 May 2024 08:21 Go to previous messageGo to previous message
jayindallas is currently offline  jayindallas
Messages: 110
Registered: June 2021
Senior Member
Actually, I think the SPR000, treated as a unknown black-box boundary, can be reverse engineered relatively easy; as a parallel effort to TTL and CPLD. I've been focusing on the SP0256 and SPRnnn serial ROM documentation. While the documentation has serious gaps, I think there is enough information in the bitsavers.org links to General Instrument documents to deduce the interface, at least close enough to converge with some experimentation.

I'm composing a message to explain its basic operations as far as I can at this time... that might help someone else to see the next missing piece or help them first-design more accurately at a SPR000 design target.

As General Instrument designed both parts, they could have (and seem to have...) taken many advantages, such as reading the next ROM/EPROM byte while the previous byte is shifting out toward the SP0256. That's something that needs to be in a TTL or CPLD circuit version, to maintain the speedy transfer. For example, most documentation seems to suggest that the ROM/EPROM data read-in, would be from blocks of sequentially addressed data, that the SP0256 serializes internally to load its registers, maybe even as a parallel load to a set of registers or all registers. So an auto-incrementing address counter, could be starting the next ROM/EPROM read as soon as the previous read was latched into the DSR (Data Serial Register) to be clocked out to the SP0256. The pre-read timing should be implemented into the TTL and CPLD circuit for best realization of the SPR000; emulating serial ROMs with bytewide memory.

Loading the ASR (Address Serial Register) would only need to be done for the first address of the data block to be read and transferred to the SP0256. Thereafter as each subsequent ROM byte is available and transferred into the DSR (Data Serial Register), the ASR is incremented and the next ROM address access time begins. These 'sweet' efficiencies can be designed into GI-to-GI components... and would be enough circuitry to justify the single chip SPR000 to do the same task, at speed, to bytewide memory.
This also fits GI's market strategy at that time; designing single chip replacements for semi-standardized common circuits in TV and other electronic appliances, in an age before pick&place assembly was available. GI's single chip standard circuits improved an electronic appliance companies' manufacturing, inventory, service repairs, design time, and reduced errors characteristic to numerous components being manually insertion to circuit board. There are also advantages of less tuning needed when all components are on the same IC circuit, when compared to numerous discrete components with individual performance within wide specification ranges.

This is why I need to compose that more detailed operations message, so the TTL and CPLD parallel efforts can more closely take the same sort of transfer time advantages that GI likely took. I think after doing that, I might wrap an Arduino around a SP0256 and emulate the upstream and downstream interface to it in software. Useful for testing and converging on a reverse engineering design for the SPR000; but I'm NOT suggesting an using Arduino as a SPR000; it's just a lab-tool.

Note: The SP0256 has, 'effectively,' a single address stack. It seems to be available so a sequential block being read, can be pause and its program counter saved on the stack, to insert a read of another commonly useful addressed sequential block, or segment that block, elsewhere in ROM. This could be used to insert phrases used over and over again.

Question: Does anyone have a Link to a SP0256 internal ROM image or listing? Even some SPRnnn serial ROM images would be useful.

[Updated on: Wed, 01 May 2024 08:48]

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