Home » RBC Forums » General Discussion » Retrocomputer projects using EPM240 development board
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Re: Retrocomputer projects using EPM240 development board [message #10788 is a reply to message #10787] |
Sat, 01 June 2024 21:30   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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RomWBW-capable Z80 mezzanine board.
The first mezzanine board is based on Z80. The design was successfully prototyped previously, so this is not a new design but instead used to check out mechanical fits. I can't find the mechanical drawing of the EPM240 dev board, but I can see the four 2x10 connectors are not on 0.1" grid. I also want a cut out for the on/off power switch; so the resulting Z80 mezzanine board is 2.1" x 3" with a cut out for on/off power switch that's slightly off-center. The four 2x10 connectors do fit correctly with EPM240 dev board.
The Z80 mezzanine board has a CMOS Z80 and 512K RAM. EPM240 contains the bootstrap ROM, emulated ACIA, memory bank logic for sixteen 32K banks, RTC interface, SD card interface, and I2C interface. EPM240 dev board has a 50MHz oscillator that's divided by 3 to 16.67MHz as Z80 clock and that is further divided by 9 to 1.852MHz which is 0.5% faster than the standard 1.8432MHz clock for 115200 baud serial port. The CPLD logic is 60% utilized.
EPM240 has an internal 1K flash which is large enough to bootstrap from SD card, but currently I bootstrap via the serial port and load monitor and RomWBW serially every power cycle. It is working, however, I've noticed that while I've tried a dozen CMOS Z80 that all worked at 3.5V, many of them won't run or failed zexall at 3.3V. The current Z80 mezzanine board design used the 3.3V generated by the regulator on EPM240 dev board, but a better solution may be a local regulator on the mezzanine board that generate 3.5V from 5V to power the Z80. As long as the mezzanine voltage is within 0.3V of EPM240 dev board, there won't be any interface issues. Power consumption while running RomWBW is 49mA @ 5V.
I still need to figure out how to boot from SD card.
Bill

[Updated on: Sat, 01 June 2024 21:36] Report message to a moderator
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Re: Retrocomputer projects using EPM240 development board [message #10792 is a reply to message #10791] |
Mon, 10 June 2024 07:16   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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I don't have much time lately, so I have not created a homepage for 3VZ80. I will soon. I'm actually pretty excited about using EPM240 dev board for other applications, such as the beam racing 65C02 you've mentioned. EPM240 chip itself is pretty cheap ($1.50) on eBay.
I think you are in USA, right? PM me your address and I'll drop off a blank 3VZ80 pc board in letter mail. You may need to screen for a Z80 that can run at 3.3V, which is about 1 in 3 CMOS Z80. I found most Z80 will run at 3.5V, however. So I plan to revise 3VZ80 with local voltage regulator adjusted to 3.5V.
EPM240's internal 1KB flash is very cool. It is enough to load programs from SD, so external boot ROM is not necessary. It is booting a small file loader now; I'm working on a SD boot loader slowly only when I have time...
Bill
Edit, another interesting possibility is 68SEC000 with SDRAM; two chip 68K mezzanine board with EPM240 handles bootstrapping, IO, and SD disk.
[Updated on: Mon, 10 June 2024 07:22] Report message to a moderator
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Re: Retrocomputer projects using EPM240 development board [message #10795 is a reply to message #10793] |
Mon, 17 June 2024 21:02   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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EPM240 has an embedded 1KB flash memory. While it is 1KB, it is actually organized as a word-wide memory, 512x16. It is somewhat painful to use word-wide memory as boot ROM for Z80, so I only use half of the embedded flash or 512 bytes to boot Z80.
The task now is fitting SD bootstrap code in 512 bytes. This is my first foray into bare metal SD access and it was painful! I started out with Wayne Warthen's RomWBW SD code and have made so many simplifications that it is unrecognizable, but it does fit 512 bytes. However, it can only handle V1 type SD card, the standard SD card in microSD format. This is the card up to 2GB in capacity.
To be compatible with RomWBW, I configure the hardware SD interface to emulate the bit-bang PIO interface. Unfortunately that's rather slow interface, only capable of 25KB/sec transfer with 16MHz Z80 clock. To boot into RomWBW from reset/power up, the 512-byte bootstrap copies 480KB RomWBW stored in SD to RAM then execute RomWBW. The picture shows RomWBW being loaded, each dot is a sector read. It takes 23 seconds to load RomWBW. I'm not happy about that.

EPM240 is 80% utilized, so I should be able implement the SD_GET and SD_PUT software routines in hardware and potentially speed up the SD access significantly.
Bill
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Re: Retrocomputer projects using EPM240 development board [message #10797 is a reply to message #10796] |
Wed, 19 June 2024 11:53   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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Great food for thought. I'm new to EPM240 and SD card interfacing, so there are plenty room for tradeoffs and optimization. EPM240 is a nice big (and cheap) sandbox. There is also a pin-compatible EPM570.
My past designs used CF disk for program storage because it only needs a few instructions to load the bootstrap code in CF disk. SD card needs many more instructions, too many to fit in the logic fabric of CPLD. So I'm interested in Max2 family of CPLD such as EPM240 that all have 1KB embedded flash which opens the door for SD card based bootstrap. The embedded flash is serial eprom, but like you've said, there is a library function for parallel interface. No free lunch, however, parallel interface for 16-bit wide data needs more logic than 8-bit, so I want to save the logic for faster SPI and other circuits, or just generally playing around.
ROMless RomWBW is indeed 480KB. One reason for its size is a 256KB RAM disk preloaded with the essential CP/M programs. Since SD card will always be there, an alternative is blank 256KB RAM disk but populate the SD card with CP/M programs. This should speed up the RomWBW loading to around 10 seconds.
Bill
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Re: Retrocomputer projects using EPM240 development board [message #10799 is a reply to message #10798] |
Sat, 22 June 2024 07:48   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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On 6502.org forum, there is a SPI design for ATF1504 CPLD, 65SPI. I've ported it to Altera. The core design is quite simple, so I should be able to fit it into EPM240. I don't necessarily want to change the SPI interface of RomWBW. CP/M programs are generally small, so 25KB/sec bit-bang is adequate to load CP/M programs; it is the loading of 480KB RomWBW image I want to speed up. I can have a separate, faster SPI interface dedicated to loading RomWBW then run RomWBW unmodified with bit-bang SPI interface.
Alternatively, I've found RomWBW system code is only 128KB, RAM disk image is 256KB, and there are significant unused space in the 480KB image. So I can just load the 128KB system code and leave the RAM disk un-initialized which takes 6 seconds to boot. I can also crank up the CPU clock to 25MHz and drop the bootstrap time to 4 seconds. Now that's tolerable bootstrap time.
CPLD are getting rather expensive now. I do have a stock pile of CPLD sufficient to last my life, but others interested in reproducing my designs may face significantly cost and availability issues. That is regrettable, but that's a constant challenge of working with obsolete technology. EPM240 remains affordable, that's probably why EPM240 development board is lesser than $10, for now.
Bill
PS, homepage for 3VZ80 is here,
https://www.retrobrewcomputers.org/doku.php?id=builderpages: plasmo:epm240dev:3vz80:3vz80rev0
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Re: Retrocomputer projects using EPM240 development board [message #10817 is a reply to message #10816] |
Fri, 12 July 2024 12:26   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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While operating Z80 at 3.3V is clearly not specified in the Z80 datasheet, operating W65C02 at 3.3V is specified in its datasheet. W65C02 datasheet indicates that 14MHz operation is possible at 3.3V, but in reality it is capable of much higher frequency. I'm shoot for the VGA frequency because I like to race the VGA beam with 25MHz 6502.
Here is rev0 3V6502 for EPM240 dev board. The 25MHz 6502 fetches a byte of image data every 8 clock cycles; the data is feed to a 8-bit shift register operating at 25MHz to drive the VGA display with 25MHz pixel clock. So the display is monochrome 640x480 with 6502 busily feeding the data during the active video period. During the vertical retrace period the 6502 can do non video work.
It is a simple design, but VGA and PS2 connectors take additional room so the mezzanine board overhang the EPM240 dev board. There is also a mistake with the PS2 placement such that it is pointing inward rather than outward. To work around the mistake, the PS2 connector is mounted tilting 30 degress up so it still can accept a PS2 plug.
Currently the 6502 is working with 25MHz clock passing memory diagnostic, so the hardware seems to work OK at 3.5V 25MHz. There are quite a bit of software works ahead.
Bill
[Updated on: Fri, 12 July 2024 12:28] Report message to a moderator
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Re: Retrocomputer projects using EPM240 development board [message #10825 is a reply to message #10822] |
Wed, 17 July 2024 11:14   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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My focus is getting 3V6502 to do 25MHz VGA beam racing, but I have another mezzanine board based on 68SEC000 which is capable of 3.3V operation. UTSource has new 68SEC000, but they renegaded on the published price and wanted much higher $14 each. So instead, I bought some from this eBay vendor and I want to test the device immediately upon receival so I can return them if they are not working.
The board design is fairly simple, consists of 68SEC000 and 512Kx16 RAM. EPM240 will provide the bootstrap code, serial port, SD, I2C, and RTC interface. RAM is not needed to run "scream" test where a small program resides in CPLD writes incrementing data to the serial port. The board has a few design errors, but it does passed "scream" test at 16.7MHz CPU clock. So I have at least one good 68SEC000.
Now back to 3V6502 project.
Bill
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Re: Retrocomputer projects using EPM240 development board [message #10826 is a reply to message #10825] |
Mon, 22 July 2024 17:59   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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The goal of 3V6502 is a standalone 6502 computer with own 640x480 monochrome VGA display capable of text and graphic, PS2 keyboard, serial port, and SD card for mass storage. While the 6502 processor is operating at 25MHz, it spends 90% of its throughput driving the 640x480 display. During the active video phase, it is servicing the 31.5KHz interrupt from the horizontal sync and output 80 bytes of video data (640 pixels) to the display. It also look for PS2 keyboard input and serial port input during the interrupt service. The processor is fully utilized during the active video phase, but every 16.7mS it has 1.4mS of vertical retrace period where it can do real work. This is not much time; it is effectively a 2MHz 6502.
I've implemented a simple monitor that can edit memory, display memory, execute program using PS2 keyboard as input and VGA monitor as output. The attached animated GIF file shows display/edit/go commands of the simple monitor running on 3V6502. The 6502 clock is 25MHz, not 25.175MHz, so the screen as captured by the video capture hardware is shifted by one character. I can adjust the video monitor to compensate for the shifted screen, but the video capture hardware is not adjustable. Anyway, the demo video shows the speed of the hardware handling scrolling and displaying of data. While the hardware can handle scrolling and displaying reasonably fast, the monitor software is quite crude and complicated due to processor spent most of its time handling video display. I want to port EhBASIC to it, but I'll need to think about how to deal with juggling multiple tasks of video, keyboard, SD card, serial port, and EhBASIC application.
Bill

Edit, This is the setup with PS2 and VGA interfaces to run the above monitor. SD card is not operational so the serial port is needed to load and run the simple monitor software. There was a layout mistake with PS2 connector, so it was assembled with 30 degree tilt so PS2 cable can be inserted.

[Updated on: Mon, 22 July 2024 21:03] Report message to a moderator
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Re: Retrocomputer projects using EPM240 development board [message #10838 is a reply to message #10837] |
Mon, 26 August 2024 16:40   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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I don't have the best reflex, but I measured either 16.8 or 16.9 seconds with a stopwatch. The duration is from "run" to "ok". I'm using MBASIC under RomWBW. According to the sign on of the program it is "BASIC-80 Rev5.21". Attached is a screen shot of the run. The serial port is non-standard 50Kbps due to 64MHz clock does not divide nicely to standard baud rates. I wonder whether slow serial port can have an impact on run time. Seems unlikely...
Bill
[Updated on: Mon, 26 August 2024 16:41] Report message to a moderator
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Re: Retrocomputer projects using EPM240 development board [message #10843 is a reply to message #10842] |
Tue, 03 September 2024 21:12  |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
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Senior Member |
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I was poking around RomWBW CP/M BIOS and patching out the various console I/O routined and timer interrupt routine to find the impact to mandelbrot benchmark. I was surprised to find that replacing CP/M BIOS with simple console output routine and disabling 50Hz interrupt have no measurable impact, but replacing RomWBW's CP/M BIOS console status with simple console status routine trimmed off 2 seconds from mandelbrot benchmark, so the benchmark went from 29.1 seconds to 27.1 seconds which is roughly same as the benchmark on your MinZ.
RomWBW version of CP/M BIOS does have more overhead, but not anything extraordinary, as far as I can tell. Now I wonder whether MBASIC calls console status frequently, far more than console output or 50hz interrupt, such that added overhead in console status routine can resulted in 7% degradation of performance.
Bill
Edit, Maybe I'm missing something reading Wayne Warthen's CP/M BIOS code. I'll ask him if CBIOS's console status does more works than console input or output.
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