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Home » RBC Forums » General Discussion » ProtoRC6, Prototype board for EPM570 CPLD (3.3V CPLD)
ProtoRC6, Prototype board for EPM570 CPLD [message #10654] Wed, 03 April 2024 19:21 Go to next message
plasmo is currently offline  plasmo
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I've built a number of prototype board for various CPLD. This is board #6 to check out a batch of EPM570, a 3.3V CPLD that I've had for a number of years. EPM570 is the logic core of Tiny040 so I want to check it out prior to building Tiny040. I have not designed with 3.3V, so this is a good platform to explore 3.3V parts.

The board is working and my batch of EPM570 have checked out, so it has served its initial purpose. Homepage for the board is here:
https://www.retrobrewcomputers.org/doku.php?id=builderpages: plasmo:protorc6:protorc6home
Bill
/forum/index.php?t=getfile&id=3010&private=0
Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10662 is a reply to message #10654] Thu, 04 April 2024 20:52 Go to previous messageGo to next message
plasmo is currently offline  plasmo
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It is known via experimentation that CMOS Z80 can run down to 3.3V with reduced operating frequency, with 7.37MHz operation appeared possible. I'm not aware of a Z80 computer designed specifically for 3.3V operation simply because Z80 specification is 5.0V, so the EPM570 proto board is a good platform to check out that idea.

I intend to build a 3V RomWBW-capable Z80 SBC based on EPM570. It is a simple design based on Z80, 512K RAM, EPM570 and CF disk. The brief description is that Z80 will boot out of CF disk, load and run RomWBW. The longer story is as follow:

1. NOP test of Z80 at 3.3V @7.37Mhz.

2. 'Scream' test where Z80 executes a small program in CPLD and continuously outputs data to serial port.

3. Serial Bootstrap where Z80 uses serial port to load and run test program into RAM.

4. Add CF disk interface and Z80 boots from CF disk

5. Install RomWBW in CF disk and boot into RomWBW.

Here is the prototype board with Z80 socket and RAM socket installed. Schematic is attached
Bill
Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10665 is a reply to message #10662] Fri, 05 April 2024 20:29 Go to previous messageGo to next message
plasmo is currently offline  plasmo
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This is finished prototype board. It was initially populated with Z80 only and 7.37MHz oscillator. It passed "scream" test where continuous stream of serial data is output to terminal. Amazingly, the scream test worked all the way to 29.5MHz at 3.3V!

Then the board was populated with 512K RAM and used serial bootstrap to load memory diagnostic which also passed up to 25MHz while supply voltage varied from 3.15V to 3.45V.

Currently the CF disk is installed and appeared to be working. The board still works at 25MHz, but I will run it at the default frequency of 22MHz. The power consumption at 22MHz is 3.3V, 48mA while running memory diagnostic.

I have several 5V Z80 designs with nominal operating frequency of 22MHz. I'm amazed the same Z80 can also run 22MHz at 3.3V!

Next step is get it to bootstrap from CF disk and then port RomWBW to it. I will do a number of tests including zexall to check out Z80 at 3.3V.

The CPLD is only 20% utilized and has a number of spare I/O pins. So later on I'll add RTC, I2C, SPI, and SD card

Bill
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Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10668 is a reply to message #10665] Sat, 06 April 2024 07:22 Go to previous messageGo to next message
plasmo is currently offline  plasmo
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The prototype is basically 3.3V version of ZRC512, so it will run RomWBW configured to ZRC512 as is. This is RomWBW running; Xmodem transfer is working; CF file copy & verify OK; Zexall is passing, so it is all good. I'll add the RTC interface and SD card interface next.
Bill
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Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10677 is a reply to message #10668] Sun, 07 April 2024 06:04 Go to previous messageGo to next message
plasmo is currently offline  plasmo
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Added additional logic and I/O pins to control DS1302 RTC and SD card. RTC is located at default IO address of 0xC0; SD interface emulated the bit-bang PIO port at 0x69. RomWBW was able to detect and configure these devices. In fact, RomWBW used the RTC to calculate the CPU clock as 21.992MHz which closely matched the actual 22MHz clock.

The bit-bang SD interface is not as fast as a dedicated SPI interface and much slower than the CF interface. I measured disk copy time of a 1-megabyte file from SD disk to SD disk as 99.9 seconds; whereas copying the same file from CF disk to CF disk was 18.8 seconds. It makes sense to build a SPI circuit in CPLD to speed up SD access. Current consumption of the hardware is 46mA@3.3V when idling in CP/M; 60mA@3.3V when copying files from CF disk to SD card.

CPLD resource utilization is 24% of available macrocells and there are still 20 spare I/O pins available. I believe there are sufficient logic to do graphic and PS2 keyboard, but that'll wait for another day.

I'm done with the 3VRomWBW prototype for now. My last thought is EPM240 development board is readily available on eBay for about $8, so a low-cost daughter board consisted of Z80, 512K RAM, SD card, and RTC can be added to the EPM240 development board to make an economical RomWBW-capable Z80 computer. Furthermore, there may be enough logic remaining to add graphic and keyboard functions to make it a standalone computer.
Bill
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Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10695 is a reply to message #10677] Wed, 10 April 2024 20:38 Go to previous messageGo to next message
plasmo is currently offline  plasmo
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While running Z80 at 3.3V is clearly not in Z80's specifications, W65C02 is rated from 1.8V to 5V. Its datasheet is somewhat vague about its max frequency at 3.3V, but 14MHz seems possible. It is commonly known that W65C02 had gone through a die shrink from 0.8u to 0.6u TSMC, but its datasheet remained unchanged. So I'm interested in top frequency of 0.6u W65C02; specifically I want to know whether it can run at VGA clock frequency of 25.175MHz.

What I found was this 6502 prototype can run 25.175MHz, but at 3.4V; it can boot from serial port, load monitor program and run memory diagnostic successfully at 3.4V at 25.175MHz. However at 3.3V the memory test failed. This may still be a RAM performance issue because I don't have 3.3V fast RAM so I just abused this 25nS 5V CY7C109 RAM and run it at 3.3V. Two strikes against it; it is not fast enough in the first place and it really is not spec'd for 3.3V operation. A proper 3.3V fast RAM probably will work just fine at 25.175MHz & 3.3V.

The result is sufficiently interesting that I plan to add a CF disk interface, VGA and PS2 connectors to beam racing VGA.
Bill
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Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10710 is a reply to message #10695] Sun, 14 April 2024 05:49 Go to previous messageGo to next message
plasmo is currently offline  plasmo
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The 3V6502 prototype is evolving into a standalone 25MHz 6502 with its own VGA/PS2keyboard and storage disk. This is a variant of VGA65, but the 570-macrocell EPM570 CPLD provides significant more logic resources than the sparse 64-macrocell EPM7064S. It also has more I/O pins, so a number of compromises made in the design of VGA65 can now be undone. I like to replace CF disk with SD disk; have an emulated 6850 ACIA instead of bit-bang serial port; and 8-bit, 31.5KHz audio output. I have ordered a couple inexpensive EPM240 development boards and plan to build retro-processor daughterboards to work with EPM240.
Bill
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Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10716 is a reply to message #10677] Mon, 15 April 2024 12:04 Go to previous messageGo to next message
wsm is currently offline  wsm
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Quote:
The bit-bang SD interface is not as fast as a dedicated SPI interface and much slower than the CF interface. I measured disk copy time of a 1-megabyte file from SD disk to SD disk as 99.9 seconds; whereas copying the same file from CF disk to CF disk was 18.8 seconds. It makes sense to build a SPI circuit in CPLD to speed up SD access.
I was doing various testing and out of curiosity thought I'd give the 1MB PIP SD to SD a try. I'm well aware that this is VERY dependent on the brand/size of card, number of 512 byte buffers, blocking algorithm, etc. etc. However, as an example of what a dedicated SPI processor can achieve with a 32 GB SanDisk SD card:

3.6 Seconds: Min-eZ eZ80 system @ 50 MHz and it's internal byte-oriented SPI processor at 8.33 MHz

5.2 Seconds: MinZ-C Z180 system at 36.834 MHz with a CPLD based byte-oriented SPI processor at 25 MHz and DMA transfers

At this time I haven't tried raising the CPLD's SPI frequency to 50 MHz which I believe most current cards support.
Re: ProtoRC6, Prototype board for EPM570 CPLD [message #10742 is a reply to message #10716] Tue, 30 April 2024 19:51 Go to previous message
plasmo is currently offline  plasmo
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Registered: March 2017
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This board looks the same as the board in the first post of this topic, but it isn't. Instead of EPM570, the part is EPM240. I found a good deal on eBay for EPM240, 10 pcs for $15.50, https://www.ebay.com/itm/292854449165 so I bought 20 pcs and check them out with the EPM570 prototype board. EPM240 has 4 extra I/O pins that are power/ground on EPM570, so as long as I define the 4 I/O pins as inputs, they won't cause problems. I built two protoboards with EPM240 and they checked out OK.
Bill
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