| Any i860 fans here? [message #10135] |
Sun, 18 September 2022 05:42  |
e2k
Messages: 33
Registered: June 2021
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Anybody still plays with intel's idea of a "cray for the poor"?
;-)
Chips are easy to get, and was a funny chip ...
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| Re: Any i860 fans here? [message #10216 is a reply to message #10214] |
Sun, 29 January 2023 03:25  |
e2k
Messages: 33
Registered: June 2021
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Member |
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etchedpixels wrote on Sat, 28 January 2023 13:48gcc used to work. You may need to build a couple of progressively older gcc compilers to build a gcc that can build an old enough gcc for i860.
What specific problems do you have and I'll take a look at cooking something up.
Alan
I really tried a lot of combinations, (on ubuntu 22LTS) but sure, I could have missed something ...
IIRC, around gcc 4.* the i860 code was slowly removed. (pretty much with the announcement of 4.0, but it was still there)
Not the same combinations of switches worked for both (binutils & gcc). sometime SYSV gave you binutils, sometimes it didn't
(sorry, sitting in the wrong office, can't check what I did)
So the "sweet spot" to have a chance, would be around late 3.* or very early 4.0, but again, couldn't find the right compiler switches ...
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| Re: Any i860 fans here? [message #10218 is a reply to message #10217] |
Sun, 29 January 2023 08:15 |
etchedpixels
Messages: 333
Registered: October 2015
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Senior Member |
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Ok the following incantations appear to work
../binutils-2.14/configure --target=i860-stardent-sysv4 --prefix=/opt/i860 --disable-multilib
make
make install
(there are probably later ones that still have the right support. I didn't look too hard)
Ensure the resulting i860 directory is on your path
edit gcc/config/i860/i860.md
go to line 1229
Comment out the stanza
;; AC
;;(define_insn ""
;; [(set (match_operand:QI 0 "register_operand" "=r")
;; (match_operand:QI 1 "indexed_operand" "m") ]
;; ""
;; "ld.b %1,%0")
which appears to be a bug that never got fixed upstream
../gcc-3.4.6/configure --target=i860-stardent-sysv4 --prefix=/opt/i860 --disable-multilib --disable-threads --enable-languages=c --disable-shared --without-headers --disable-libssp --disable-libmpx --disable-libatomic
make
make install
[Updated on: Sun, 29 January 2023 08:16] Report message to a moderator |
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| Re: Any i860 fans here? [message #10219 is a reply to message #10218] |
Mon, 30 January 2023 04:26 |
e2k
Messages: 33
Registered: June 2021
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Member |
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etchedpixels wrote on Sun, 29 January 2023 08:15Ok the following incantations appear to work
...
Hello again, THANKS for that, you definitely got me on the right track.
On my system (Ubuntu 22LTS, gcc 11) it didn't work completely, but the flags/switches seems to be right.
Tried binutils 2.14, 2.15, 2.16.1, 2.17, 2.18, 2.19.1, 2.20.1 ... Finally, 2.25.1 worked
gcc-3.4.6 worked, after some massaging 
gcc-4.0.* all failed with internal compiler error
after that, support for the i860 was removed.
THANKS again!
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| Re: Any i860 fans here? [message #10258 is a reply to message #10135] |
Fri, 03 March 2023 04:08 |
drogon
Messages: 2
Registered: February 2019
Location: Scotland
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Junior Member |
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e2k wrote on Sun, 18 September 2022 13:42Anybody still plays with intel's idea of a "cray for the poor"?
;-)
Chips are easy to get, and was a funny chip ...
A bit late to the party, but I've only just remembered about this place ...
I did some work with the i860 back in its day - I worked for a UK Supercomputer computer company and they were a stop-gap from Transputer to Sparc... 40Mhz, capable of 3 instructions per cycle (in-theory) so they seemed like a good thing - and they were - but were a right PITA to code for.
They are a 32-bit RISC CPU with MMU and the Integer side was fairly nice/orthogonal but the floating point side... The chip has a 64-bit data bus and can read 2 instructions at a time. One is for the Integer CPU, the other for the floating point unit. This was called dual-instruction mode - and since one FP operation is a combined multiply and add, this is where it gets the 3 instructions per cycle claim from.
The FP side has to be "hand cranked". So you'd typically use the integer instructions to load a value into the FP pipeline, then 8 cycles later (IIRC) the result would come out, meanwhile you have to use those 7 cycles to continue to load another 7 FP values in the pipeline - so there was a latency for individual operations, but matrix operations would fly and could crank out FFTs and things where multiply and add was a good thing but the code had to be very carefully done by hand - later tools did help though (but that was after my time with them). I've no idea if the last supported GCC could 'vectorise' operations or not.
The biggest headache was taking an interrupt. Then you had to flush and save the state of the FP pipeline, restore the FP pipeline for the interrupt process and carry on. This took several 100 cycles (again, IIRC). So as an embedded system with no interrupts (or simple interrupts that didn't need to touch the FP side) it might be fine, but to use it for e.g. Unix (and I think there was a Unix for it at one point), was somewhat sub-optimal.
Anyway there you go. I load a good few braincells to dual-instruction mode but it was fun at the time. I understand a lot of the internals of it made it into the MMX, etc. instructions in later Pentiums.
-Gordon
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