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| As we all tend us use circuit CAD programs, maybe we should have another RBC Forum location? [message #9075] |
Tue, 31 August 2021 12:26  |
jayindallas
Messages: 110
Registered: June 2021
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Senior Member |
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As I have mentioned previously, I'm converting to Kicad for my circuit CAD needs. I'm using Kicad 5.1.4 and its brittle on the system I'm using at the moment... but its good enough to learn on.
I have a simple question on EEschema and have read their documentation for answers. However, this falls into best-practices by those that have tried various methods.
I am entering my EZ80F91 LQFP Symbol into EEschema. I have it the way I like it, mostly. On my of professional CAD system, the power and ground signals are left invisible by way of taking the unused pins and tabulating them into a SIGNAL table, where you assign each pin number to some net like VCC, VDD, GND, etc.
Here's my EZ80 symbol in EEschema:
I looked at the logic symbols first and noticed that some were done with EEschema hidden pins on Unit A. Others kept the logic units clear of power and ground and created an artificial unit E which had a simple square for the component and a VCC pin up, GND down. That was rather nice.
For my EZ80, most of the VDD/GND pins are side-by-side pairs, such as pin 6:VDD, 7:GND etc. Three others are unpaired GNDs. The side-by-side pairs are often useful to tie a close cap between them, so I planned to either form a Unit B for the VDD/GND pins or just put them underneath the EZ80 symbol, invisible, and make them visible if I wanted to use them to designate VDD/GND pair caps.
I drew the pins below the EZ80 symbol and made them invisible. This leaves the CONNECT-circles visible; I assume if I pulled VDD pins to the power level, those pins would be connected and those circles would likewise disappear. The GND pins would likely do the same if tied to ground.
This doesn't feel like the best solution.
I could draw it as a unit B, for power connections, like this (or a vertical version) where the symbol body is C-shaped (or inverted U-shaped).
(VDD) 6 14 22 31 37 47 59 81 88 98 112 122 133
| | | | | | | | | | | | | |
| c c c c c c c c c c c c c
| | | | | | | | | | | | | |
(GND) 7 15 23 32 38 48 60 64 72 82 89 99 108 113 123 134
Frankly this illustrates the situation better but its really just too much trouble and just adds confusion. In drafting, simplicity communicates best.
Usually caps like this are just shown nearby with power and ground and an annotation explains their intended proximity to VDD/GND pairs. Or a note "at U1 pins 6,7" etc.
What is a better way to do this in EEschema?
UPDATE:_____________________
After doing an unrelated roadtrip, I've thought of an interesting way to treat a microcontroller/microprocessor. Because of the number of connections the micro tends to appear by itself with buses and off-page signals around it. Perhaps a better way is to break it up into UNITS A...N where each represents a portion of the micro that by itself, is more useful in an I/O section to be just that small part of the micro that is needed there?
For example, I have the four ports grouped together, Port A...Port D. It might be more useful to make each port a UNIT (like a quad logic gate unit) that can be located anywhere the associated circuitry needs to be in the schematic; i.e. away from the micro itself. Likewise the Ethernet pins might be a UNIT, and some of the special I2C interfaces or JTAG. The MEMORY section is basically a section that is only relevant on a page showing the memory chips so making it a UNIT would be useful.
That leaves the micro mostly as ADDRESS+DATA+XTAL+BUS+VARIOUS.
That might be a more useful way to put the extended I/O micros on schematics.
[Updated on: Wed, 01 September 2021 04:55] Report message to a moderator |
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| Re: As we all tend us use circuit CAD programs, maybe we should have another RBC Forum location? [message #9086 is a reply to message #9078] |
Wed, 01 September 2021 19:59  |
jayindallas
Messages: 110
Registered: June 2021
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Senior Member |
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lynchaj wrote:
"...I don't think we need another separate forum...Splitting it out further will only dilute it even more..."
JayInDallas replies:
I think you're right.
- - - - -
wsm wrote:
"...Trying to create useful symbols for large chips with alternate functions can create some head scratching...but don't recommend it for processors...This is the Eagle symbol that I use for the eZ80F91 which makes it easy to add buses for address, data, MII, UARTs, SPI, etc..."
JayInDallas replies:
A lot of similarity in our styles with some exceptions. Seeing more styles of schematic creation can help someone when they get into a difficult situation and have seen some other styles and their advantages and disadvantages. Sharing information helps everyone.
I agree that when you list all the I/O selections for a pin in the symbol body, its handy documentation and also makes hobbyists curious to lookup what it all means. I clearly don't do that in the final version of my schematics, because I want them concise. And making component symbols too big take away the open space you need to connect the signals. I'm a big fan of one schematic on one page.
As I prefer to make the chip outlines as small as possible (EZ80F91 would be IMPOSSIBLE) so I omit long pin names and reduce them to 3 or 4 letters in semi-cryptic form. What is less clear when looking at the final schematic is that I start with all that information around the processor symbol usually as supporting graphics or note labels. As I make the design in the CAD system, the notes help me decide which pins to use for which connections. You can see that in an example EZ80F91 image below which I'll show signs of the design evolution in process.
(This is in my old professional CAD program)
EZ80F91_Design_In_Place.png
First you can see that the EZ80F91 doesn't fit within this monster component symbol. The top is missing, but it shows the address and data buses created to connect anywhere else in the schematic. This EZ80 is typical in that it sits in a corner by itself surrounded by a drawn box, so it doesn't connect directly to anything except the crystal circuit and a few other close in items. The fact that its isolated in a box because its too big, is why I'm about to experiment with UNITIZING a EZ80F91 into small UNIT portions than can be placed nearer the circuit they're involved in.
When I'm using a new micro, I add a lot of notes about what some pin names are about, particularly if they remind me of something they are not about. You'll see a few times when I placed a note about a pin right on top of the EZ80 symbol. When the schematic is completed, I'd go through and purge those to reduce the clutter.
First, on the right hand side near the top you'll see two pin boxed "I2C" notes. This tells the reader where that schematic section is loaded, i.e. near a block labelled "I2C Interface" elsewhere. Unitizing this as a UNIT partial would allow me to place that part of the EZ80 right into the schematic that uses it.
Below it the JTAG connections. Here I've given signal names with a "J" prefix to make their cluster obviously related and to separate them from the activity pins of the micro.
The Ethernet section is not connected below those pins as I'm not a fan of slow ethernet.
Maybe the interesting thing is the Port A:B:C:D section at the bottom. Looking at Port A on the right you see the starting format of all the Ports. The micro pin inside the symbol is PA1 or PA.1 etc and not a descriptive name of the signal use intended. The bright cyan bar are actually 8 boxes along side each pin marking that these pins are unassigned or unused. You can see the separate pin boxes below in in Port B where four pins are unassigned/unused. Note that when a pin is assigned a use, its signal named accordingly as "MOSI" "MISO" and "SCK". Each has a box note indicative that the circuitry attached in in a section called "SPI". Additionally, pin PB6 has been signal named "#EN.ADR".
A note on the side points out that Port B has Schmitt triggered inputs, so if I need one, I can choose an unused pin in Port B. As Port A hasn't been used for anything yet, it has its signal use documented by the cyan boxes and a note on the side suggest using the port for LEDs or a sound playback feature.
On the left side Ports C and D are completely assigned. The cyan boxes have been removed because there are no available pins. Each pin is signal named after its serial port function and number. This design was excessive in using all 8 pins on two ports because it was intended as a useful tool with old serial devices. Note some notes state the purpose of the serial pins and the bottom two denote they can be used for IRDA RX and TX.
One last advantage is by having the port pins named as the port and bit number, such as PB5 or PB.5 when I make a signal like #EN.ADR which may be at "bit-banged" control line, the schematic clearly tells be that the signal #EN.ADR is PB.5 so I know which port and bit to manipulate when writing the supporting firmware for that function.
In the final form of this schematic, all of the supporting design notes could be removed and unused pins would have their signal lines removed, clearly unconnected.
You might note that I'm no fan of using connection bridges denoting by shape, input, output or bidirectional. As CAD allows you to put that in the pin definitions and use it in electrical design checking, I don't waste the time to load anything but one connection bridge symbol. I like it this way because the all align and you can see that nothing is missing. If various bridge symbols were used, you'd have a jagged edge which distracts and offers little real value in my opinion.
In my UNITIZING the EZ80 symbol, I plan to have:
for the basic essentials of the micro ADR/DAT/JTAG/RTC/XTAL/BUS/VARIOUS
for Port A
for Port B
for Port C
for Port D
for Ethernet
for I2C Interface
for Memory WAIT/CSx
[Updated on: Thu, 02 September 2021 19:53] Report message to a moderator |
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| Re: As we all tend us use circuit CAD programs, maybe we should have another RBC Forum location? [message #9093 is a reply to message #9087] |
Thu, 02 September 2021 11:17 |
jayindallas
Messages: 110
Registered: June 2021
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Senior Member |
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wsm wrote:
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"...I also tend to try do my schematics on a single 8.5"x11" sheet. During the initial development I tend to place logic blocks wherever (often outside the page) and then when the design is ready for PCB fabrication I move things around and condense it to fit within the "paper" outline..."
JayInDallas replies:
--------------------
Good schematic layout is a lot like pcb layout, you notice the tight relationships between parts of the schematic and like shoving a set of components on a pcb CAD, you can move parts of a schematic together to better simplify the drawings and make the big-picture of the design easier to see.
Since the 1990s I have been using older versions of Microsoft POWERPOINT to plan new products/designs. Its really a convenient conceptual-drawing program for dimensionless-concept blocks. Powerpoint keeps it quick and simple when you mostly rely on copying and modify existing blocks or notes and keep away from the features that slow things down. Powerpoint restricts you from doing things a CAD drawing program will allow you to do, and that is an ADVANTAGE because less options, keeps you working efficiently with the basics.
Its a good way to think about feature sets that might work for variant designs. I often take complete pages and copy it to another slide and change it up to explore slightly different variant to see if the idea works too. Often the ideas turn into block diagrams and then to component choices and a light flow control of an sparse schematic before moving into CAD. That process also can reveal some of the logical groupings that you'll end up using in schematics or pcb.
I'll try to add a quick example into this message later.
In my world, Microsoft has only created two important and useful products: 1) EXCEL Spreadsheet, and 2) POWERPOINT for planning-drawings
And this is from someone who always wrote on a telecom-corporate surveys asking how to improve efficiency, "REMOVE POWERPOINT FROM MOST EVERYONE'S COMPUTER." I'll validate that by saying that my first day in a new group at a telecom company, was spent in a meeting for the whole group to discuss fonts, colors and powerpoint "looks" for a department presentation to their vice president. I even stopped the meeting early on to asked if this meeting was a joke to play on the new guy (me)? They were dead serious about their fonts and they were wasting a lot of salary-time on stupid pursuits. 
wsm wrote:
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"...As to "slow" Ethernet: Yes the eZ80 is slower than 1Gbps or 10Gbps interfaces but even it's 10Mbps interface should be faster than the UART ports, depending on network traffic etc. There's lots of alternatives but in the end this is simply a fast Z80 with limited data transfer requirements..."
JayInDallas replies:
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Exactly... I'm doing a crazy eZ80 design which places several eZ80 SBCs on a 32-bit data bus for block-size DMA transfers with an ARM processor acting as the external peripheral controller. I don't want the bus filled with eZ80 chatter so I am using the eZ80's slow ethernet for communications/coordination between ALL the processors, eZ80s and ARM.
[Updated on: Fri, 03 September 2021 07:24] Report message to a moderator |
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| Re: As we all tend us use circuit CAD programs, maybe we should have another RBC Forum location? [message #9094 is a reply to message #9085] |
Fri, 03 September 2021 07:18 |
jayindallas
Messages: 110
Registered: June 2021
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Senior Member |
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mikemac wrote:
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"...Or put them in a separate unit, arranged in whatever consistent order you prefer..."
JayInDallas replies:
--------------------
I think that's probably the best method for Kicad for the way I do things.
Leaving the power/ground unit unplaced on the schematic would be effectively the same as the hidden power/ground method, as it would be like unused logic gates, the pcb CAD knows all of that component/chip is still on the circuit board whether its hidden or not.
You just make the first non-standard unit the power/ground unit (for quad logic, A,B,C,D would be standard for each logic gate so unit E becomes the power/ground unit). For single-unit component symbols, just make unit-B the power/ground.
I'll add to that that all voltages that may change by model number but use the same symbol, could be kept easier by using aliases to the other models and just labelling the pins with voltage selections to an unknown net like "UKN", "NULL" or "ERR". The electronic rule test will catch that and flag it for correction. Then just Edit the part on the schematic, not the library symbol (assuming Kicad allows that), and replace the unknown net with the selected voltage net. Just make that power/ground unit VISIBLE for only those that are thus corrected to document the selections. No need to make any other component symbol's power/ground unit visible, unless that's you style.
That would just about cover it.
[Updated on: Fri, 03 September 2021 08:36] Report message to a moderator |
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