Hi Andrew,

It all run probably. One question to ask. Is there possible to only install one 512k SRAM on memory bord to boot RomWBW? How to setting the jumper of the memory board. Any advices, Thanks.

Nice build vackon. Good luck.

Thanks
Eugene

Jumpers
JP1 is Boot RAM Option. Pins 1-2 closed (default) for Boot enable assuming single RAM board present in system. Will cause upper 32KB RAM page to be present at power on or after reset. Only one RAM board per system can be boot enabled. Multiple RAM boards can be present but only one can be boot enabled and rest must have JP1 open or bus contention.

K2 is RAM size option. Pins 1-2 closed for 128KB RAMs (both RAM0 and RAM1) (default). Pins 2-3 closed for 512KB RAMs.

K7 is for 32 pin 128KB RAM0 or 512KB RAM0. Pins 1-2 closed for 512KB RAM (default). Pins 2-3 closed for 128KB RAM. One or the other must be selected.

K9 is for select Upper 32KB of RAM to be fixed, Lower 32KB of RAM to be switchable Pins 2-3 closed (default) or both to be switchable pins 1-2 closed. Note: software needs to support latter feature. RomWBW assumes default of pins 2-3 closed. One or the other must be selected.

K6 is to select whether fixed top of RAM to be 32KB pins 1-2 closed (default) or 16KB pins 2-3 closed. One or the other must be selected.

JP2 is battery select jumper option supports both RAM0 and RAM1. Pins 1-2 closed for onboard CR2032 battery (default). Pins 3-4 must be closed also if CR2032 is used (default). Optionally pins 3-4 can be used as external battery connector with pin 4 is positive terminal, pin 3 is negative (ground).

JP3 and JP4 for U16 DS1210 installed pin 1-2 open (default). Closed both pins 1-2 to bypass. Default is both open. Note, if pins 1-2 closed U16 must be removed or unreliable operation.

K3 DS1210 RAM0 power sag tolerance feature, pins 1-2 closed 10% power sag (default), pins 2-3 closed 5%. One or the other must be selected or NVRAM will not work. If experiencing random lockups try 10% power sag setting or diagnose power supply issues.

JP5 and JP6 for U9 DS1210 installed pin 1-2 open (default). Closed both pins 1-2 to bypass. Default is both open. Note, if pins 1-2 closed U9 must be removed or unreliable operation.

K1 DS1210 RAM1 power sag tolerance feature, pins 1-2 closed 10% power sag (default), pins 2-3 closed 5%. One or the other must be selected or NVRAM will not work. If experiencing random lockups try 10% power sag setting or diagnose power supply issues.

Hi,
I have questions, maybe I should re-read the documentation, maybe there are answers.
I add that I have a CPU speed of 3.5MHz and I mixed LS / ALS and HCT chips.

1 / Z80PROC3 - WAIT LED - shouldn't it be connected behind jumper JP2? It still shines like this. Still showing Wait cycles.

2 / Z80SERIAL3 - is jumper J1 used in RomWbW? I didn't influence whether INT was used

3 / Z80ROM2 - When I want to use only 32kB Eprom without RomWBW. E.g. simple image NASCOM 8K BASIC.
I set: K1, K6 and K8 according to the type EEPROM / EPROM / 32 / 28pin
JP1 will be closed for access to the lower 32kB and K2 does not matter how it will be set?
I get it OK?

4 / Z80RAM3 - here is the worst :), very complicated board, at least for me :)
Please, can I use only 1x512kB chip?
Is it enough not to install RAM1?
JP1 when it is closed so it means the only RAM board in the system and at startup it is connected to the bus, right? I get it OK?
K9 allows me to switch upper and lower 32kB as needed, right?
K6 is for the size of the upper switchable RAM (32 or 16), right?

I still can't quite imagine the combinations JP1, K9 and K6 :(.

Please when I want to run NASCOM 8K BASIC again with 32kB ROM and 32kB RAM, how to set JP1, K9 and K6?

Thanks a lot and I apologize for so many questions and for my English
Jan

Hi,
still query RAM 512 / 1024kB.
Is the error wrong with me or RomWBW?
Whether I put 512 or 1024kB, it still shows me the same RAMDisk size 256kB
I would expect more at both 512 and 1024.
512 - 64 = 448
1024 - 64 = 960
Where is the problem ?

Thanks a lot
Jan

Hi,

One more thing. Maybe you will have experience and teach me time.

I have a problem on the MBC bus. My system now depends on the order of the boards on Z80BCKPLN1.

I need to have the Z80RAM3 in a slot closer to the Z80PROC3 than the Z80ROM2.
E.g.
UART, nothing, ROM, nothing, RAM, nothing, PROC that's OK
UART, Nothing, RAM, Nothing, ROM, Nothing, PROC that's not OK
It's strange, but it's true.

Some timing issue, build error, or faulty chip.

I'll check all the connections and replace the chips, or build another RAM board to check.

Some idea, some advice :).
Thanks a lot
Jan

Hi,

I finally got the RomWBW v3.1 working.



But no luck on install only one 512K SRAM on memory board to boot RomWBW. I am using RAM Memory Board V2.

Thanks
Eugene

Hi,
small question, is it possible to specify which SP1 speaker you used on the Z80Clock board?
I'm ordering and I don't know if it's expected Electromagnetic buzzers Without oscillator circuit (passive)
e.g. https://cz.mouser.com/ProductDetail/TDK/SD1614T5-B5ME?qs=W0y vOO0ixfFFx4HV4HmQKQ%3D%3D

or with oscillator (active, one tone, one frequency).

Thanks a lot
Jan

Z80 VDP1A



Hi
This is first iteration of upcoming Z80 VDP1A board. It is based on the V9938 section of the S-100 MSX VDP board updated to support V9958. It is designed for output compatible with GBS-8200 video converter boards. Since there are multiple ways to design V9938/V9958 video output stages the plan is to design two boards and downselect depending on which one does best. This design uses multiple discrete components to fashion a video output stage similar to how implemented on S-100 MSX VDP (demonstrated working design).

Please review and comment on design. I am especially interested in usability concerns as these boards are highly complicated and usability can suffer with all the many options available.

Thanks, Andrew Lynch