Home » RBC Forums » General Discussion » ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF.
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| Re: ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF. [message #8324 is a reply to message #8323] |
Wed, 17 February 2021 12:08   |
plasmo
Messages: 916
Registered: March 2017
Location: New Mexico, USA
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Senior Member |
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Clock (pin_21 of RC2014 connector, or pin_43 of CPLD, or pin_47 of Z280) will start off at 3.68MHz, but once reset is negated and processor initialized, the clock should be 14.7MHz. This is the clock that is divided down to generate the 1.84MHz for the serial baud clock, so if your clock is 3.68MHz, the serial port is 28800.
Something is not right with the reset. MCP130 comes with several different flavors and the pin assignments are different. Some MCP130 does not have internal pull up resistor. The one I use has internal 4.7K pull up. My part is MCP130-450DI/TO. MCP130-485 can work with higher supply voltage, but make sure it is DI/TO.
Bill
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| Re: ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF. [message #8332 is a reply to message #8330] |
Thu, 18 February 2021 17:57 |
plasmo
Messages: 916
Registered: March 2017
Location: New Mexico, USA
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Senior Member |
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I'm puzzled why your 14.7MHz clock is not clean. It is generated from 29.5MHz by Z280 so it should be a nice-looking square wave. The fact it is 14.7MHz means the CPLD has generated the correct value for the Bus Timing and Initialization and Z280 should be in UART bootstrap mode.
Hmmm, do this for me: instead of setting your TeraTerm console to 115200 Odd parity, set it to 115200 Even parity; power up ZZRCC in serial bootstrap mode and press a key on your keyboard. This will transmit a character to Z280's serial port, but with the wrong parity. You should see the LED on CP2102 USB-serial adapter silkscreened with 'RXD' turn red and stays red until next reset. This means Z280 is in serial bootstrap mode and has just received a character with bad parity and therefore responded with the error condition. If the 'RXD' LED does not turn red, Z280 is not in serial bootstrap mode.
Could you post detailed pictures of your board both the component side as well as the solder side?
Bill
Edit: Assuming Z280 is in UART bootstrap mode and is receiving data correctly, the next question is whether the RAM is working properly. You are using AS6C4008 (512Kx8) RAM, right?
[Updated on: Thu, 18 February 2021 18:02] Report message to a moderator |
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| Re: ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF. [message #8333 is a reply to message #8332] |
Fri, 19 February 2021 05:33 |
quarterturn
Messages: 86
Registered: April 2018
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I'm not able to get the RXD LED to light with the incorrect parity setting.
There IS a way the setup works, at least to get the serial bootstrap loaded: set the USB power jumper, remove the barrel jack plug, and plug the USB serial adapter in backwards! I 'discovered' this by accident last night. It should be impossible for this to work, but through some luck of current source and sinks it must power the CPU and bounce the rails in such a way that serial actually works.
This isn't all that helpful in diagnosing the issue, but I thought I'd mention it. At this point I suspect the CPLD, since it was from ebay and has lasered-on markings, and these days half the stuff sold there is counterfeit. Only reasonable thing I can think of it maybe I need to check the 'erase' option when programming? I checked 'write' and 'verify', and Quartus II said it was successful.
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| Re: ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF. [message #8336 is a reply to message #8335] |
Sat, 20 February 2021 06:47 |
plasmo
Messages: 916
Registered: March 2017
Location: New Mexico, USA
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Senior Member |
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quarterturn wrote on Fri, 19 February 2021 09:15Yes, inexplicably it works with the serial adapter connected upside-down. It won't go beyond that step, presumably as the CPLD isn't getting any power.
That's too weird!
CPLD does played a role in that weird case because CPLD generated the proper value on Z280 data bus at reset to enable serial bootstrapping. This weird case does show that serial bootstrap data reached Z280 and successfully stored in RAM to execute.
The question now is why serial bootstrap data did not reach Z280 in normal case. Have you trace the serial input signal from pin 3 of serial port connector through R7 to pin 48 of Z280?
I like you to double check that R5 is not populated, R6 and R7 are 100 ohm, and R9 is 1.8K.
Bill
PS, Like you've said, jumpers T7 and T12 are for putting Rx and Tx signals on RC2014 bus. They are not needed right now.
[Updated on: Sat, 20 February 2021 06:48] Report message to a moderator |
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| Re: ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF. [message #8481 is a reply to message #8480] |
Tue, 20 April 2021 14:55 |
plasmo
Messages: 916
Registered: March 2017
Location: New Mexico, USA
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Senior Member |
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borutk wrote on Tue, 20 April 2021 14:10Plasmo, could you dump your CF card in a file and add that to wiki?
I have built the ZZRCC but i have problems getting the board to boot the serial loader,
maybe because on linux i have minicom, where file upload is only x, y, z modem and ascii.
Mincom under Linux has no ability to send binary files? Egad, I wish I've known about this earlier, it completely mess up the serial bootstrap method, at least under Linux.
The alternative is burn a CF image, but without serial bootstrap backdoor it is difficult to customerize the image.
ROMWBW has been ported to ZZRCC, so you can download ROMWBW and build the image for ZZRCC and copy it to your CF disk. I don't have Linux, so I can't help you with the step-by-step instruction.
I need to experiment more with read and write CF image and find a solution around the lack of serial bootstrapping...
Bill
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| Re: ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF. [message #8488 is a reply to message #8487] |
Fri, 23 April 2021 09:59 |
norwestrzh
Messages: 196
Registered: November 2015
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Senior Member |
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If you have something that runs on the micro, and understands .HEX format, it can "load" a program, that comes over a serial connection, into the micro memory. With CP/M 2.2, you can then use the "save" built-in function to write that loaded image to "disk" as a .COM file. The only trick is to slow down the "/bin/cat" execution sufficiently so that the micro can keep up with the (probably *MUCH* faster) LINUX/UNIX system. I use a program that I call "HXIN" that runs on my Z80's, and then a monstrosity, that I call "trickle", to slow the Linux transfer down (i.e. "trickle <whatever>.hex > /dev/ttyUSBx"), where ttyUSBx is the console on the Z80. A kludge, but it works. I call it "crude but effective".
[Updated on: Fri, 23 April 2021 10:00] Report message to a moderator |
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| Re: ZZRCC, Z280+RAM+CPLD+CFdisk, replacing ZZ80CF. [message #9806 is a reply to message #9801] |
Thu, 03 March 2022 15:23 |
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Wayne W
Messages: 385
Registered: October 2015
Location: Fallbrook, California, US...
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Senior Member |
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Hi Borut,
The current dev branch of RomWBW includes a ready-to-run CF Card image for ZZRCC. This image can simply be written to the start of a CF Card. This image will boot from ZZRCC -- it includes all the bootstrap stuff. You can find RomWBW development snapshot builds at the RomWBW GitHub releases page at https://github.com/wwarthen/RomWBW/releases. Download the "RomWBW-SnapShot-Package.zip" file from the Assets of the latest development build. Within the Binary directory in that zip file, you will find "hd1024_zzr_combo.img". This is the image file that you can write to your ZZRCC CF Card.
Let me know how you do.
Thanks,
Wayne
[Updated on: Thu, 03 March 2022 15:24] Report message to a moderator |
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