Re: New Board Development - SBC6120-RBC Edition [message #756 is a reply to message #755] |
Mon, 06 June 2016 12:06   |
davetypeguy
Messages: 41 Registered: November 2015 Location: Chapin, SC
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Hurray! I was able to finish the "6th" of the 5 prototype boards over the weekend. I installed the jumper fix on the back, and finally received the missing part I was waiting on (vendor shipped the wrong chips and had to replace them). I had issues with the terminal acting up, but after reading Will's description of his problem being due to a bad GAL, I reprogrammed the GALs with my "new" old Advin programmer ($100 used from eBay) and it cleared up the issues. Highly recommended, by the way, if you can get one reasonably priced. I still have the TL866 if I need it, but the Advin just seems to work without issue.
I still have to test out the IDE port (will look into making image tonight), but the leds are progressing through the proper sequence and I am able to enter monitor commands. I am ordering another oscillator to test it at 8MHz, just to see if it will work. BTW, I bought my 6120 from UTSource and the 6402 from Jameco. Both appear to be fine.
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Re: New Board Development - SBC6120-RBC Edition [message #777 is a reply to message #760] |
Sat, 11 June 2016 10:50   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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All of the credit for the overall layout goes to Bob Armstrong @ Spare Time Gizmos for creating the design and making it available for others to use. I've re-captured the schematic into KiCAD and made a few tweaks (and some mistakes on the prototype boards!) but I can't take credit beyond that.
Attached are schematics and board plot files for V1.00. Please take a good look over the next day or two everyone - especially at the ROM address pins!. My plan forward is the following:
-Update the wiki page w/final information on V1.00, with a sub-page documenting the 0.99 board ECNs in case anyone forgets later on
-Do a small run (~5 is the lowest number that makes sense costwise) of 1.00 boards with EasyEDA and build one up on my side to confirm the tweaks we made are working, the fixed ROM data line order, offboard reset switch, PTCC for feeding power to IDE->CF adapters, etc.
-Take names for a larger batch here, on the VCF forum, and on the STG Yahoo group
-Do a larger run with PCBCart - since they save the tooling it makes future repeat orders less expensive.
I have also been mulling over offering sets of HD-6120/HD-6402 or HD-6120/HD-6402/GALs/EEPROMs. This is certainly a hobby project and I don't want people to expect a ton of hand-holding in building their boards...so maybe that's not such a great idea? What do you guys think?
[Updated on: Sat, 11 June 2016 10:50] Report message to a moderator
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Re: New Board Development - SBC6120-RBC Edition [message #780 is a reply to message #777] |
Sun, 12 June 2016 02:01   |
rhkoolstar
Messages: 276 Registered: October 2015
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Hi Andrew,
Looking over your work, as per request, I found a few points of interest on the board:
I would assume that J2 (IDE) pin 20 - F2 -J16 pin 2 (essentially the IDE VCC input) should be in the SUPPLY net class.
I would move the extra RESET connector J17 slightly more inward, as the connections now are routed outside of the board margin.
Suggest rotating C8, C9 and C19 to locate them better to the VCC pins
Carried over from the original design: decoupling cap C12 is ineffective, as the VCC pin of U18 (52C55A) is pin 26. The cap should be located near this pin.
Maybe you should assign 'keepout' areas around the mounting holes, as several traces run the risk of being compromised by mounting hardware
I think the schematics are sound. I have been imitating your work; converting the original into kicad. Very instructional, and it makes checking a lot easier.
I would have wired the datalines of the RAM identical to the ROM (6 lines per IC and "big-endian") but there is no need to introduce cosmetic changes like this, running the risk of newly introduced errors.
Also I made library components for the HD-6120, HD-6402, 52C55A and GALs, conforming to Bob Armstrongs original layout. Additionally I used the 628128 component for the RAM. Maybe this is something you would want to use for the "release" schematics.
I attached my library in case you are interested.
RHK
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Attachment: SBC6120.lib
(Size: 10.26KB, Downloaded 514 times)
[Updated on: Sun, 12 June 2016 02:29] Report message to a moderator
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Re: New Board Development - SBC6120-RBC Edition [message #804 is a reply to message #780] |
Sun, 12 June 2016 21:09   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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rhkoolstar wrote on Sun, 12 June 2016 02:01I would assume that J2 (IDE) pin 20 - F2 -J16 pin 2 (essentially the IDE VCC input) should be in the SUPPLY net class.
It should be, updated this. I'll need to re-route the board in Freerouting as a result, so let's get any final changes in now!
Quote:I would move the extra RESET connector J17 slightly more inward, as the connections now are routed outside of the board margin.
Also a good suggestion, I moved this inward and away from U21 a hair as well.
Quote:Suggest rotating C8, C9 and C19 to locate them better to the VCC pins
I rotated C9 & C19, but C8 is in the correct orientation for U11 (IOT 2 GAL) vs U21 (flip-flops for POST LEDs). U11 is more important, so I left C8 as-is.
Quote:Carried over from the original design: decoupling cap C12 is ineffective, as the VCC pin of U18 (52C55A) is pin 26. The cap should be located near this pin.
The original design was 4 layers so all the capacitors are basically working together as capacitance between the 2 inner layers (power/GND). I'll go ahead and move this over for the benefit of our new 2-layer design.
Quote:Maybe you should assign 'keepout' areas around the mounting holes, as several traces run the risk of being compromised by mounting hardware
The original board has traces routed near the holes, and the FP6120 manual specifies the use of nylon mounting hardware. I'd rather not constrain the Freerouting algorithm any more than I have to.
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Re: New Board Development - SBC6120-RBC Edition [message #811 is a reply to message #804] |
Mon, 13 June 2016 09:28   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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After making the updates mentioned, the board re-routed down to only 41 vias (10 less than the prior run!). I think rotating the 2 caps and moving C12 made the larger SUPPLY-class traces simpler and opened up more room to route the other traces.
I'll get new .pdfs out for everyone to review late this evening, but things are looking pretty good!
[Updated on: Mon, 13 June 2016 09:29] Report message to a moderator
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Re: New Board Development - SBC6120-RBC Edition [message #831 is a reply to message #454] |
Sat, 18 June 2016 11:32   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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Okay, since there are no other comments I'm going to fix Note 1 on the schematic and remove the 'Draft' designation and call this v1.00.
I'll order 5 v1.00 boards from EasyEDA. These will be green solder mask / HASL finish / 2 oz cooper. I need 1 to build up and test here, rhkoolstar gets 1 so we can add a new person testing v1.00 & the 'mini front panel' can get tested, and there will be 3 left. If anyone else is interested in building up 1 of those three v1.00s, let me know. I am 99% sure the layout is correct now, but we might still find some small tweaks are needed.
Once I can test a v1.00 board, I'll do posts in the Yahoo group, VCF DEC forum, etc to collect names for a larger run from PCBCart. I am leaning toward offering the HD-6120/HD-6402/EEPROM/GAL kits as well - probably as a 1-time run for now due to the time involved in programming/testing. I plan to add ZIF sockets stacked on top of my board so I can test the chips as a set before sending them out.
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Re: New Board Development - SBC6120-RBC Edition [message #1092 is a reply to message #1089] |
Mon, 05 September 2016 19:57   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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Senior Member Administrator |
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Completed testing of the following items:
-External reset switch header - works OK
-Powering Syba SD-CF-IDE-DI via power on Pin 20 - works OK
-28C256 EEPROM / 27C256 EPROM switching with J15 - works OK (tested with EEPROMs from original STG board & new EPROMs)
-The 74ACT373 chips that would not boot in the 0.99 board (unless the board was place on a non-conductive sheet on top of a metal foil sheet) - boot OK with the v1.00 board routing!
I stress tested the board with both 74HC373s and the formerly problematic 74ACT373s by running a small BASIC program to calculate the Fibonacci Sequence all the way to the largest number handled by the OS/8 BASIC. No problems.
I think I am going to make one change to the silkscreen on the final v1.00 production boards to add a note about J16 / F2 being optional.
Otherwise this is looking good. I'll work on updating the wiki page with more information this week & by next weekend hope to be collecting names for a big run of boards.
[Updated on: Mon, 05 September 2016 19:58] Report message to a moderator
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Re: New Board Development - SBC6120-RBC Edition [message #1188 is a reply to message #1101] |
Mon, 26 September 2016 09:03   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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Attached is a fun new image file for writing to a CF card using Win32DiskImager or dd. With the latest (2014) updated version of OS/8 Adventure!
It has two drives - SYS:/DSK: (same drive) is the OS/8 / source code / compiled binary image from Rick Murphey's Adventure site and IDA1: is the BASIC games image from the original Spare Time Gizmos site.
To run Adventure:
.R FRTS <enter>
*ADVENT <enter>
*<ESC>
<Wait approximately 1 minute, 15 seconds for game to load>
To list the BASIC games on IDA1:
.DIR IDA1:
To run the BASIC games on IDA1:
.COMPILE IDA1:<FILENAME> <ENTER>
<Wait for game to load>
For a list of all the BASIC games, see the 2nd directory listing on https://www.grc.com/pdp-8/os8-sbc.htm
Also on SYS: on this version of OS/8 is a version of the TECO editor that uses VT100 escape codes to move the cursor around the screen, etc - I haven't played with that too much but it seems like it could be pretty useful.
(This is a somewhat later version of OS/8 'V3T' than the one in the other SBC6120 images 'V3Q', for some reason running BASIC directly does not seem to work properly but using COMPILE does even though it doesn't actually compile anything - if anyone can figure this out it would be greatly appreciated. The version of FORTRAN IV on the original SBC6120 OS/8 image was missing PASS2O.SV and could not compile Adventure, which took some trial and error to get running, so I created the new image instead using a version I knew would work.)
[Updated on: Mon, 26 September 2016 09:04] Report message to a moderator
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Re: New Board Development - SBC6120-RBC Edition [message #1242 is a reply to message #454] |
Sat, 15 October 2016 13:26   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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I noticed something strange in my testing. Out of 3 different brands/types of CF cards that I tested, 1 card hangs on bootup:
-Random Canon 32MB card that was a pack-in with a digital camera in 2005 - OK
-Kingston 4GB card 'CF/4GB' - OK
-SanDisk Ultra 4GB 25MB/s - HANGS
The first thing I tried was soldering a 22uF capacitor to the bottom of the board between J2-Pin 20 (CF card power) and GND, thinking maybe the CF card needed some additional decoupling. But that didn't seem to help.
The next thing I checked was the voltage making it to the CF card - only 4.73V! Then I checked directly on the output of the main board fuse (F1) and found that that voltage was only 4.73V. There was over 300mA of voltage drop across F1. Interesting.
So I made some measurements of the STG SBC6120 and the SBC6120-RBC Edition Rev 1.00 (without the CF card drawing power):
-STG SBC6120 - current draw ~103 mA, F1 resistance 1.3 ohm, voltage drop across F1 = .133 V, voltage at IC Vccs = 5.04 V
-SBC6120-RBC Edition 1.00 - current draw ~207 mA, F1 resistance 1.5 ohm, voltage drop across F1 = .310 V, voltage at IC Vccs & CF card = 4.83 (!) V
Hm, interesting, the RBC Edition is drawing 2x the current of the original STG board. I wonder why?
I narrowed the issue down to the GALs. My new Rev 1.00 board was using Lattice GALs, while the original STG chips are the lowest-power version of the Atmel ATF chips. A final measurement with switched chips confirmed this:
-SBC6120-RBC Edition 1.00 w/STG Atmel GALs - current draw 105 mA, F1 resistance 1.5 ohm, voltage drop accross F1 = .157 V, voltage at IC Vccs & CF card = 4.97 V - SanDisk CF card boots OK!
There's a couple potential solution here for people wanting to power their cards on Pin 20:
-Use the lower-power Atmel ATF GALs (ATF16V8BQL-15PU & ATF22V10CQZ-20PU) to keep the overall board current draw and hence the voltage drop across F1 lower
-Install a fuse with a lower nominal resistance, for example a .750 A fast-blow fuse ( http://www.littelfuse.com/~/media/electronics/datasheets/fus es/littelfuse_fuse_251_253_datasheet.pdf.pdf) has a nominal resistance of only .175 ohms.
On further consideration though - I do think additional decoupling of the CF card is prudent & I have gone ahead and added a location for another 47 uF capacitor just *after* the fuse, just before J2-Pin 20.
That rolls the Rev to 1.10, it should the last change before we go to mass production!
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Re: New Board Development - SBC6120-RBC Edition [message #4000 is a reply to message #1247] |
Sat, 23 December 2017 07:38   |
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will
Messages: 213 Registered: October 2015
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Hey
Just got out my SBC6120 today to write some software.
Can't seem to get it to run even simple BASIC programs. I'm using the "sbc6120_firstrun_25sept2016.img" disk image from the RBC wiki. Tried a couple of CF cards with the same results.
I know on this first PCB rev some of the decoupling caps are not correctly connected so I've added extra decoupling on the rear of the board between VCC/VSS on the CPU, RAMs, UART, 8255, and all three GALs. No change.
Here's a log of what I see:
(hardware reset)
SBC6120 ROM Monitor V271 Checksum 3732 7215 6243 15-APR-04 10:28:05
Copyright (C) 1983-2004 Spare Time Gizmos. All rights reserved.
NVR: 0KB - Battery FAIL
IDE: 2001MB - SILICONSYSTEMS INC 2GB
>B
-IDA0
.R BASIC
NEW OR OLD--NEW
FILE NAME--FOO
READY
10 PRINT "HELLO WORLD"
20 GOTO 10
RUN
FOO BA 7A
?Halted at 17403
PC>7403 PS>1011 AC>0000 MQ>0000 SP1>0000 SP2>0000
>
(hardware reset)
SBC6120 ROM Monitor V271 Checksum 3732 7215 6243 15-APR-04 10:28:05
Copyright (C) 1983-2004 Spare Time Gizmos. All rights reserved.
NVR: 0KB - Battery FAIL
IDE: 2001MB - SILICONSYSTEMS INC 2GB
>B
-IDA0
.BASIC
NEW OR OLD--NEW
FILE NAME--FOO
READY
10 PRINT "HELLO WORLD"
20 GOTO 10
RUN
FOO BA 7A
?Panel trap at 67777
PC>7777 PS>1066 AC>1035 MQ>0000 SP1>0000 SP2>7777
>
Note the only different between the two sessions above is how BASIC is invoked - "R BASIC" versus just "BASIC". Not entirely sure what the difference is. Each fails in its own way, consistently.
Any suggestions for what is wrong or what I might try?
PS behaviour is identical with CPU clocked at 5MHz and 8MHz, and with two different power supplies (rated 3A and 2.5A; board draws only 0.2A)
[Updated on: Sat, 23 December 2017 07:44] Report message to a moderator
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Re: New Board Development - SBC6120-RBC Edition [message #4001 is a reply to message #454] |
Sat, 23 December 2017 08:05   |
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Andrew B
Messages: 467 Registered: October 2015 Location: Near Redmond, WA
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Senior Member Administrator |
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Will - it's much more likely that this is a problem with my image file than with you hardware.
I'm honestly not much of an OS-8 expert and my focus with that image was fixing some FORTRAN issues so I could compile/run the latest version of PDP-8 Adventure on it.
I thought I had tested some of the BASIC games and they ran fine though.
I'll burn a fresh image and try the same set of commands and see what I get back.
[Updated on: Sat, 23 December 2017 08:13] Report message to a moderator
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Re: New Board Development - SBC6120-RBC Edition [message #4002 is a reply to message #4001] |
Sat, 23 December 2017 08:34   |
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will
Messages: 213 Registered: October 2015
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Senior Member |
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Ah, clever chap.
Switched to using "SBC6120.ide" downloaded from grc.com and BASIC is working (once I'd figured out what "ME 10" meant!)
LIST
FOO BA 5B
10 FOR A=1 TO 5
20 PRINT "NUMBER"; A
30 NEXT A
40 END
READY
RUN
FOO BA 5B
NUMBER 1
NUMBER 2
NUMBER 3
NUMBER 4
NUMBER 5
READY
Much better!
[Updated on: Sat, 23 December 2017 08:34] Report message to a moderator
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