Hi Folks

Working towards getting my KISS68030 running and have a couple of questions based on the fact that I can get nothing out of the serial port yet...Further, experimenting with various DRAM sometimes I get a solid green RUN light and I can see what looks like good activity on the bus monitor. Other times it wont RUN on power up or flips over to STOP within a few seconds and looks like it locks up.

**The KISS-68030 must be updated to version 1.1. The Wiki pages have the update info.
**The MF/PIC boards 1.0, 1.1, 3.0, 3.1 have one MANDATORY update; and one update required for the KISS-68030 board if you want to run Linux. Update to -008 suffix.


So the questions
1. Which ROM file should I look to use? kissbios.rom or the 68K firmware version 10.2 file ? Will the firmware come up even if there is no DRAM?

**The KISS instructions indicate that TEST15 should first be burned to ROM and run on a new board.
**After TEST15 passes, then the version 10.2 ROM (May 2016) should be used. Install the 68030 version, not the 68008 version.


2. I found the RAM Compatibility list https://www.retrobrewcomputers.org/doku.php?id=builderpages: tschaaps:kiss68030-ram-compatibility and reading this with the board page I take it that I can only use single sided 16MB, double sided 32MB, single 64MB or double sided 128MB 72pin, 60ns DRAM. The 4MB and 8MB DRAM that I have just wont work ? Any more detail here?

3. Is there jumper documentation for the KISS68030? Have setup as per the photos but I would like to understand that better if possible.

**Check the PDF schematics. The RAM size and 'sided-ness' must be set up correctly. ROM jumpers will need to be correct, too. The wait state jumpers should be set to conservative values, i.e., higher. I think the board itself is self-explanatory.

**What speed oscillators are you using? 8mhz determines the refresh timing, and may not be changed. The other two may be as high as 66/33, 64/32, 64/25, 50/25. Second is CPU timing; first is DRAM timing, which is usually about 2x CPU timing. Wait states matter, too.

4. I see reference to flash codes on the CPU board in various threads. Is there a more formal list or a video showing correct operation etc...?

**The README file in the Zipped distributions should have the info. The 10.2 ROM readme is complete; the TEST15 is lacking.

for reference my config is as follows
- 12 slot backplane (has been working nicely with the SBCV2 and a lot of other cards)
- ECB Bus Monitor
- MF-PIC
- KISS68030 with the modifications as per https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=b oards:ecb:mf-pic:update-2015-09-22.txt

**The Bus Monitor may not be useful. The KISS puts addresses (32) on the bus, but not data; unless, it is accessing the MF/PIC board.

Any pointers, information and suggestions welcome

**I thought the MC68030 was overly sensitive to VCC. Check that VCC on the CPU board is within 5% tolerance, or better. The extra caps (elecrtolytic or tantalum) are a help. Extra electrolytic decoupling on the backplane is also recommended. I think you received the Backplane build notes.

**RS-232 problems are the !#@!@##-est to track down.

regards

Richard

030 board - KISS 1.1-006 no errata
MF-PIC board rev 3.1-007 with mandatory update wire RP2:8 to U3:28 ONLY at this stage.
ECB Mini Backplane - 3 Slot
PC Powersupply