Home » RBC Forums » General Discussion » Porting CP/M 68K to a repurposed ADC Soneplex MPU board (CP/M 68K)
|
Re: Porting CP/M 68K to a repurposed ADC Soneplex MPU board [message #3425 is a reply to message #3419] |
Fri, 08 September 2017 12:49   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
|
Senior Member |
|
|
For those interested in playing with the repurposed SPX-MPU board running CP/M 68K in simulation, attached is the S-record of programs loaded in the repurposed SPX-MPU board. The same programs can also be loaded into EASy68K's Sim68K and execute in simulation. You will see the same results (with some limitations explained later) in simulation as you'll see with the actual hardware. However, you will have much greater visibility in the simulated environment: you can display and change the memory contents and you can single-step BIOS code. Since the disks A, B, &C are all in memory (disk A&B are read-only flash memory, disk C is a RAMdisk), the contents of disks can be displayed as memory. Simulation on my 2.4GHz PC is faster than the actual hardware running at 16MHz. For an example, the ASCII art program runs in 41 seconds in simulation vs 104 seconds on the hardware.
For people already have the actual SPX-MPU hardware, the simulated environment is still useful because if the hardware behaves unexpectly, you can run the same code in the simulated environment and compare results. Another use for the simulated environment is developing codes for the CPM-68K BIOS.
As mentioned before, there are limitation to the simulation, specifically the simulated console is a virtual console so there are no easy way to upload or download files from console to/from CPM. Kermit does not work in simulation which is a bother because currently the gkermit program can't receive binary files from CPM (it can send binary & text files to PC, and it can also receive text files from PC without problems), and I'm unable to debug that problem in simulation. Similarly, microEMACS expects the console to be a VT52 terminal and uses escape sequences to manipulate the cursor position. That doesn't work with simulated console.
This is the step-by-step instruction for simulating CP/M68K in SPX-MPU board:
1. run Sim68K (the program can be downloaded from easy68k.com)
2. in the drop-down menu under 'File', select 'Open...' and pick 'MPUBIOS.S68'
3. In the drop-down menu under 'File', select 'Open Data...' and pick 'CPM15000.s68' <--this is CPM15000.sr binary of CCP and BDOS.
4. In the drop-down menu under 'File', select 'Open Data...' and pick SIMDSKA.S68 <-- this is drive A image
5. In the drop-down menu under 'File', select 'Open Data...' and pick SIMDSKB.S68 <--this is drive B image
6. In the Registers area, change 'PC=' field to 00015000 <-- this is the start address of CPM-68K
7. Press 'run' icon (or F9). You should see the A> prompt in the console. You are now running CP/M-68K.
|
|
|
|
|
Re: Porting CP/M 68K to a repurposed ADC Soneplex MPU board [message #3436 is a reply to message #3435] |
Sun, 10 September 2017 18:51   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
|
Senior Member |
|
|
Roger & Gary,
I'm glad you've received the board in great shape. Did you take a look at drive C? Drive C is a RAMdrive backed up with a super capacitor. The capacitor can keep its content intact for well over a week on my bench, but I'm curious whether the anti-static bag would discharge the capacitor during shipping.
I'll answer your question about the switches directly, but it is also an action item for me to update the wiki page with better organized info regarding memory map & I/O schematics.
The hex switch and 3-pos toggle DIP switch are buffered via UG2 (HC244) and appear as a memory location as follow:
DIP SW1 is d0, with 10k pull up,
DIP SW2 is d1, with 10k pull up,
DIP SW3 is d2, with 10k pull up,
d3 is pulled up with 10K,
Hex switch SK3 pin 1 to d4, with 10K pull up,
Hex switch SK3 pin 4 to d5, with 10K pull up,
Hex switch SK3 pin 3 to d6, with 10K pull up,
Hex switch SK3 pin 6 to d7, with 10K pull up,
Note: the 4-bit input value for SK3, d4-d7, is invert of the value printed on the switch.
Attached is a hand-sketched schematic of the switches (You can see the envelop glue lines because it was literally on the back of an envelop).

For completeness sake, the high byte of the discrete inputs are buffered through UG11 (HC244) & UG3 as follow:
d8 is 96-pin DIN pin B27 pulled up with 10K, 10K series resistor to UG11,
d9 is 96-pin DIN pin A27 pulled up with 10K, 10K series resistor to UG11,
d10 is 96-pin DIN pin B28 pulled up with 10K, 10K series resistor to UG11,
d11 is 96-pin DIN pin A28 pulled up with 10K, 10K series resistor to UG11,
d12 is 96-pin DIN pin B29 pulled up with 10K, 10K series resistor to UG3,
d13 is 96-pin DIN pin A29 pulled up with 10K, 10K series resistor to UG3,
d14 is 96-pin DIN pin B30 pulled up with 10K, 10K series resistor to UG3,
d15 is 96-pin DIN pin A30 pulled up with 10K, 10K series resistor to UG3,
The memory map of the I/O resources is as follow:
0x300000-0x30001F, 82C55
0x300020-0x30003F, 68692 DUART
0x300040-0x30005F, real time clock, RTC72423 <- backed up with super capacitor
0x300060-0x30007F, switch inputs <- this is the hex switch/DIP switch/DIN connector
0x300080-0x30009F, special function, still need to figure it out.
The connection of the DB25 connector on the face plate:
DB25-2 RX buffered via UH12 to 68692-35 (RxDA)
DB25-3 TX buffered via UH12 to 68692-33 (TXDA)
DB25-5 RTS buffered via UH12 to 68692-32 (OP0)
DB25-4 CTS buffered via UH12 to 68692-42 (IP5) & 68692-8 (IP0) <- these are engineering changes, the blue wire on 68692 and a long blue wire at the back of the board.
You may also be interested in the pin definition of the 96-pin DIN connector. I attached a text file below. It needs to be clean up and included in the wiki, but it is information you and other users (there are 5 users right now) of this board may want to have now.
-
Attachment: ug2-sch_F.jpg
(Size: 905.83KB, Downloaded 3413 times)
-
Attachment: Din96.txt
(Size: 4.15KB, Downloaded 548 times)
[Updated on: Sun, 10 September 2017 19:00] Report message to a moderator
|
|
|
|
|
|
|
Re: Porting CP/M 68K to a repurposed ADC Soneplex MPU board [message #3452 is a reply to message #3450] |
Wed, 13 September 2017 17:56   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
|
Senior Member |
|
|
etchedpixels,
Thank you for your interest in the repurposed SPX-MPU board for CPM-68K. I have not shipped package internationally for quite a while. According to the US Postal Service, First Class International to UK is $22.50. I need your postal code in UK to get a accurate quote from UPS, and if you have a preferred carrier, I'd happy to use it.
The board does have a 16-bit interface to IDE via the 82C55. To read a CF sector of data (512 bytes), the processor needs to:
1. assert nCS, IDE data register (addr 0x0) lines on 82C55 port C,
2. assert DIOR line (82C55 port C),
3. read in low byte IDE data (82C55 port B),
4. read in high byte IDE data (82C55 port A),
5. negate DIOR line.
Repeat steps 1-5 256 times to read a CF sector. I measure 8.6uS to do step 1-5, so the max transfer rate is 230k byte/sec.
Bill
Edit: Looking at the code again, I can optimize by using address pointers and movep instruction. So the loop time is reduced to 3.1uS for an effective transfer bandwidth of 650k bytes/sec
[Updated on: Wed, 13 September 2017 18:23] Report message to a moderator
|
|
|
|
|
|
|
|
|
|
|
|
Re: Porting CP/M 68K to a repurposed ADC Soneplex MPU board [message #3995 is a reply to message #3874] |
Fri, 22 December 2017 10:01   |
plasmo
Messages: 916 Registered: March 2017 Location: New Mexico, USA
|
Senior Member |
|
|
A number of forum members have purchased the MPU302 (AKA repurposed SPX-MPU board), I thought it maybe useful to document the frequently asked questions here.
wiki page for MPU302 is here:
https://www.retrobrewcomputers.org/doku.php?id=boards:sbc:mp u302
Powering up: If you have the CF daughterboard/MPU302 combo, you MUST power up via the 2.5mm power jack on the daughterboard (center lead is 5V, barrel is ground). This is because the 5V is shorted to ground when 2.5mm power plug is not inserted. Expected power consumption is 300mA @ 5V
Serial port connection: Terminal program should be configured to 38400 baud, N,8,1, with RTS/CTS hardware handshake. The serial port voltage level is RS232, not TTL, so it won't work with the cheap serial-to-USB adapters with TTL level I/O. A DB25 to DB9 (assuming serial port cable out of the PC is DB9) is needed with the following wiring:
DB9 DB25
2---------3
3---------2
7---------4
8---------5
5---------7
As many MPU302 I've plugged/unplugged, I find the DB25 connector difficult to unplug, so I actually used the pigtail kludge in the picture on my bench.
Boot to CP/M-68K:
When power is applied initially, the MPU302 will sign on with:
AMBug v2.07aHardware handshake with CTS/RTS, 8/30/2017
RAM at $0 and alias at $200000, boot ROM at $600000. Type "he" for help
>
Type 'bo' to boot into CP/M-68K <--This is obscure because 'bo' command is not shown in the 'help' menu. I'll fix that in next revision.
[Updated on: Fri, 22 December 2017 10:16] Report message to a moderator
|
|
|
Re: Porting CP/M 68K to a repurposed ADC Soneplex MPU board [message #4704 is a reply to message #3306] |
Sun, 13 May 2018 03:52  |
b1ackmai1er
Messages: 396 Registered: November 2017
|
Senior Member |
|
|
norwestrzh wrote on Sat, 05 August 2017 10:18Hmmm .....
MBASIC(interpreter) (Z80 @ 10 MHz) 1:54
MBASIC(interpreter) (FPGA Z80 :46 (equiv. to ~25 MHz)]
CB68(compiled) (68k @ 6 MHz) 4:23 <== I can get it to work on one of my slower 68ks
EhBASIC(interpreter) (68k @ 12 MHz) 0:55
EhBASIC(interpreter) (CP/M 68k @ 12 MHz) 1:26
EhBASIC(interpreter) (68k @ 10 MHz) 1:06
EhBASIC(interpreter) (68010 @ 10 MHz) 1:02
EhBASIC(interpreter) (8-bit strapped 68EC00 @ 10MHz) 2:55
GCC(compiler) (68k @ 12 MHz) 0:20
asciiart.bas benchmark for Rienk's sbc-2g-512 7.3728Mhz Z80 board running NASCOM ROM BASIC Ver 4.7:
2m43s
10 FOR Y=-12 TO 12
20 FOR X=-39 TO 39
30 CA=X*0.0458
40 CB= Y*0.08333
50 A=CA
60 B=CB
70 FOR I=0 TO 15
80 T=A*A-B*B+CA
90 B=2*A*B+CB
100 A=T
110 IF (A*A+B*B)>4 THEN GOTO 200
120 NEXT I
130 PRINT " ";
140 GOTO 210
200 IF I>9 THEN I=I+7
205 PRINT CHR$(48+I);
210 NEXT X
220 PRINT
230 NEXT Y
Ok
run
000000011111111111111111122222233347E7AB322222111100000000000000000000000000000
000001111111111111111122222222333557BF75433222211111000000000000000000000000000
000111111111111111112222222233445C 643332222111110000000000000000000000000
011111111111111111222222233444556C 654433332211111100000000000000000000000
11111111111111112222233346 D978 BCF DF9 6556F4221111110000000000000000000000
111111111111122223333334469 D 6322111111000000000000000000000
1111111111222333333334457DB 85332111111100000000000000000000
11111122234B744444455556A 96532211111110000000000000000000
122222233347BAA7AB776679 A32211111110000000000000000000
2222233334567 9A A532221111111000000000000000000
222333346679 9432221111111000000000000000000
234445568 F B5432221111111000000000000000000
864332221111111000000000000000000
234445568 F B5432221111111000000000000000000
222333346679 9432221111111000000000000000000
2222233334567 9A A532221111111000000000000000000
122222233347BAA7AB776679 A32211111110000000000000000000
11111122234B744444455556A 96532211111110000000000000000000
1111111111222333333334457DB 85332111111100000000000000000000
111111111111122223333334469 D 6322111111000000000000000000000
11111111111111112222233346 D978 BCF DF9 6556F4221111110000000000000000000000
011111111111111111222222233444556C 654433332211111100000000000000000000000
000111111111111111112222222233445C 643332222111110000000000000000000000000
000001111111111111111122222222333557BF75433222211111000000000000000000000000000
000000011111111111111111122222233347E7AB322222111100000000000000000000000000000

[Updated on: Sun, 13 May 2018 03:54] Report message to a moderator
|
|
|
Current Time: Thu Feb 13 23:12:13 PST 2025
Total time taken to generate the page: 0.00926 seconds
|