| ZRC, A Z80 SBC for ROMWBW [message #7886] |
Sun, 26 July 2020 04:44  |
plasmo
Messages: 916
Registered: March 2017
Location: New Mexico, USA
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ZRC (Z80, RAM, CPLD) is a simple Z80 SBC design that specifically targeted ROMWBW. It has large RAM (2megx8 DRAM) and a 6850-like serial port and memory bank select function in CPLD to satisfy ROMWBW. It also has an optional compact flash interface which turns out to be highly desirable.
The original idea of ZRC is having a simple bootstrap code in CPLD that uses high speed serial port (230400 baud) to load ROMWBW every power cycle. It depends on a TeraTerm macro to manage the various file loads. That turns out to be "a concept only the inventor could love"; and even I am tired of the 50+ second file load every power cycling. So the CPLD bootstrap ROM is modified to also look for CF disk and load & run CF bootstrap in Master Boot Record. The 512K ROMWBW image is stored in CF as a CP/M file that can be loaded into lower 512K of DRAM.
ZRC is currently running with 14.7MHz clock. To be compatible with RC2014 peripherals, the clock may need to be reduced to 7.37MHz. Homepage for ZRC is here:
https://www.retrobrewcomputers.org/doku.php?id=builderpages: plasmo:zrc
I made a short video of ZRC booting into ROMWBW. The first 3 seconds of the video is ZRC powering up and counting down from 9 to 0 waiting for serial bootstrap input. If serial bootstrap is not received at the end of the countdown, it then loads and runs the CF bootstrap code stored in master boot record. The bootstrap, in turn, loads and run ZRC Monitor located in track 0, sector F8-FD of CF disk.
At the 6 second mark, a monitor command 'b4' is issued to boot up ROMWBW. This command loads the ROMWBW image that's stored in first file of the first slice into lower 512K of DRAM and runs it. This is the standard 512K ROM with 512 directory entries. Directory of drive C shows the file "ROMWBW.IMG" which is the 512K ROMWBW image.
https://youtu.be/OkKbqTN_fvo
Bill
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