Home » RBC Forums » General Discussion » Simple 68020 (Experimental 68K)
Simple 68020 [message #4745] |
Thu, 07 June 2018 09:35  |
jbforrer
Messages: 25 Registered: May 2017
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Junior Member |
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Greetings,
Finally got to play with a 68020 after finding a design by Bas de Jong, a Dutch Ham Radio enthusiast.
This a very basic, but functional layout constructed on a piece of RS perfboard. All point-to-point soldered.
Runs stable at 20MHz with no wait states. 1MB SRAM wired 16-bit (55ns), 27C256 EPROM (55ns) and 68681 DUART for console I/O.
The 16V8B GAL (7ns) does address decoding, 8/16-bit bus access, and some glue logic. Otherwise, the usual RESET/HALT circuit and clock oscillators.
The MC68020RP16E is clocked at 20MHz and are stable. A modified version of a 68K monitor originally developed by Antonakos is in EPROM.
The board draws some 400mA, perhaps may run off USB power.
Further hardware and code development remains, but a modest beginnings.
Trust this is of interest.
Cheers.
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Re: Simple 68020 [message #10396 is a reply to message #10395] |
Sun, 27 August 2023 18:36   |
norwestrzh
Messages: 196 Registered: November 2015
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Senior Member |
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Thanks for the pointer to that Signetics Document. I'll check it out!
I hesitate to do this because I'm a complete amateur with no formal training in electronics. Please keep that in mind when you look over this simple-minded schematic. I didn't want to tackle dynamic bus sizing, so I tried to lock the 68020 in the 8-bit data bus mode. Just trying to keep it simple.
I've built a 68000 SBC 
with a quite similar design. It runs at 25 MHz and is stable. It uses a Toshiba 82C55 (PDIP) for the compact flash interface (not in the photo, but in the final version), and that works quite well. I went with the PLCC footprint for the 82C55 on the 68020 in an attempt to save some PCB space. I'm sorry I did. Perhaps the Toshiba chip would be a better choice?
In the past, I've had lots of trouble with compact flash, specifically the timing around IOW*, IOR*, and the compact flash select. I have no sophisticated diagnostic tools. Just a logic probe. Hard to track down complex problems with that!
You'll notice that I have a jumper in the 68020 schematic so that I can bypass some of the read/write logic for the 82C55. I wasn't sure how to wire it up, so I tried to allow some latitude in generating those signals. Turns out that jumper wasn't any help at all.
Roger
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Re: Simple 68020 [message #10398 is a reply to message #10396] |
Mon, 28 August 2023 13:22   |
coredump
Messages: 33 Registered: January 2020 Location: Germany
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Member |
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Hi Roger,
wow, DSACK0* grounded! ;-)
norwestrzh wrote on Mon, 28 August 2023 03:36
I hesitate to do this because I'm a complete amateur with no formal training in electronics.
I guess we all have hobbies far away from our profession, don't we?
And You would hardly be the first one violating a timing requirement. ;-)
Quote:I've built a 68000 SBC 
with a quite similar design. It runs at 25 MHz and is stable. It uses a Toshiba 82C55 (PDIP) for the compact flash interface (not in the photo, but in the final version), and that works quite well. I went with the PLCC footprint for the 82C55 on the 68020 in an attempt to save some PCB space. I'm sorry I did. Perhaps the Toshiba chip would be a better choice?
68000 has a 4 clock bus cycle, 68020 has a 3 clock bus cycle. So it's not perfectly comparable.
And these 8255 have a recovery time. Means there is a minimum time between any two accesses.
A 68020 with the code in the cache and it's 3 clock bus cycle can have much shorter times between two accesses even with the same code.
These 8255-variants seem to have all different timing requirements.
Eg. OKI MSM82C55A is /RD pulse width >100ns, /WR pulse width >150ns
NEC 71055 is /RD pulse width >150ns, /WR pulse width >100 ns. Funny..
I beg You to tell me which 8255 in PLCC You have available and which Toshiba-type is actually working with the 68000(the exact types to find the fitting datasheets).
There seem to be 5 spare inverters and one spare 74LS11 gate. right? Any other spare gates on the board?
If it comes to tinkering: Do You have a 74HCT04 at hand?
Tomorrow seems to be a rainy day here and after work maybe I can have a closer look.
Quote:In the past, I've had lots of trouble with compact flash, specifically the timing around IOW*, IOR*, and the compact flash select. I have no sophisticated diagnostic tools. Just a logic probe. Hard to track down complex problems with that!
Indeed. But a logic probe is better than a wet finger to test for voltage. ;-)
You can certainly do some testing to come down to the problem behind.
The 8255 seems suspicious. But possibly the bug is somewhere else. Or it can be written but not read from. Or vice versa.
Such insight helps a lot to track the error down.
You might try to set a port as output, write a pattern into and test with the probe.
And You can read from a port and write the result repeatedly to the UART and pull down inputs with a resistor.
A running monitor program would save a lot of test program writing...
Quote:You'll notice that I have a jumper in the 68020 schematic so that I can bypass some of the read/write logic for the 82C55. I wasn't sure how to wire it up, so I tried to allow some latitude in generating those signals. Turns out that jumper wasn't any help at all.
Not at all! You can remove the jumper to connect anything useful to the midpoint (like /DS or /AS) without cutting a single trace.
Detlef
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Re: Simple 68020 [message #10399 is a reply to message #10398] |
Tue, 29 August 2023 10:06   |
norwestrzh
Messages: 196 Registered: November 2015
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Senior Member |
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Hi Detlef,
>> wow, DSACK0* grounded! ;-)
Is that a bad thing? If the other components on the board are fast enough to keep up, why not? See, that's where the "rank amateur" part comes in. *wink*
I seem to remember, back in the day, a vendor that sold an add-on board for the PC[?] based on the 68000. They published a newsletter called "DTACK Grounded", and the 68k on that board ran with DTACK grounded. BUT, it was a 68000!
>> 68000 has a 4 clock bus cycle, 68020 has a 3 clock bus cycle. So it's not perfectly comparable.
I didn't know that!
>> A 68020 with the code in the cache and it's 3 clock cycle can have much shorter times
>> between two accesses even with the same code.
But, I was led to believe that the cache on a 68020 is disabled at reset. Is that wrong? I haven't done anything to enable cache. Or, are you speaking of a different cache?
>> I beg You to tell me which 8255 in PLCC You have available
Harris CS82C55A-5, OKI MSM82C55A-2, and Intersil CS82C55A
>> which Toshiba-type is actually working with the 68000
TMP82C55AP-10 (PDIP). I think I've also gotten just a vanilla Intel P82C55A (PDIP) working.
>> There seem to be 5 spare inverters and one spare 74LS11 gate. right?
Sounds right.
>> If it comes to tinkering: Do You have a 74HCT04 at hand?
Yes. I might even have a 74HC04 too.
I can poke at the 82C55 using the on-board monitor and some things appear to work. I can't remember all of the things I've tried, but for example, sending an 0x80 to the control port of the 82C55 [should set all ports to output?] seems to work. It clears A, B, and C to 0x00. This might verify your speculation that there is a timing problem with access to the 82C55? Obviously, writing to the 82C55 from the monitor is much slower than doing it from some sort of application? What puzzles me is slowing the the CPU down to something like 4 MHz doesn't seem to change anything.
I appreciate your comments. They are very helpful. Gives me some things to check. I also have some spare PCBs. I can send you one if you'd like to have something to play with. *grin*
Roger
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Re: Simple 68020 [message #10401 is a reply to message #10399] |
Wed, 30 August 2023 11:13   |
coredump
Messages: 33 Registered: January 2020 Location: Germany
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Member |
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Hi Roger,
norwestrzh wrote on Tue, 29 August 2023 19:06Hi Detlef,
>> wow, DSACK0* grounded! ;-)
Is that a bad thing? If the other components on the board are fast enough to keep up, why not? See, that's where the "rank amateur" part comes in. *wink*
I seem to remember, back in the day, a vendor that sold an add-on board for the PC[?] based on the 68000. They published a newsletter called "DTACK Grounded", and the 68k on that board ran with DTACK grounded. BUT, it was a 68000!
By no means something is wrong with it. It just also reminded me on Hal Hardenberg's newsletter and that made me smiling. It just
needs to be renamed now ;-)
Quote:
>> A 68020 with the code in the cache and it's 3 clock cycle can have much shorter times
>> between two accesses even with the same code.
But, I was led to believe that the cache on a 68020 is disabled at reset. Is that wrong? I haven't done anything to enable cache. Or, are you speaking of a different cache?
So the cache is off and there is some headroom on even more improving the Mandelbrodt benchmark.
Quote:
Does this demonstrate that the 82C55 is working properly?
I'm quite surprised. I just read what's printed on the 68020 on Your photo. At 25MHz that's quite a good show for the processor, the 82c55 and the SCN68681 to work
properly. But obviously they do. So yes, it shows that You can read and write the registers.
Surely You could write test code like a RAM-test to check if it is possibly somewhat flaky in it's response
but I would leave this side of the 82C55 alone for now.
More interesting might be to attach the logic probe to each IDE-connector pin in turn and set/reset the corresponding pin from the monitor program
just to verify each one is working and connected correctly. That's tedious but brings some confidence.
If that works out it's probably 'only' a software problem.
Maybe You took the software from your 68000-design?
Since the addresses of the PPI-registers have changed and the MOVEP command won't work if it did on the 68000 there
is much room for tiny mistakes.
A little thing that should be changed is the SIZ1-line of the processor. It's an output and should not be grounded as in the schematics.
And You have the pinout of the DIL version of 8255 in Your schematics but are using the PLCC variant.
Finally the 8255-variants (except for the Intel 82C55) come out of reset with floating port lines.
The 74LS04-Inverters usually take the open input as a 'H' and consequently the IDE-Interface has both /RD and /WR strobes activated at the same time.
Maybe it's worth two 2K7 pull down resistors at the inputs of both inverters. But if it works without it's probably not worth doing so.
Something must be left for the next design.
Good luck with the further investigation!
I'm much interested how Your interesting project will proceed.
Detlef
[Updated on: Wed, 30 August 2023 11:40] Report message to a moderator
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Re: Simple 68020 [message #10459 is a reply to message #10401] |
Thu, 19 October 2023 08:59  |
norwestrzh
Messages: 196 Registered: November 2015
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Senior Member |
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Just to follow up on this, Detlef, I finally got the 68020 to work with a PLCC version of the 82C55. I think I'm using the Intersil version of the chip, and haven't (yet) had a chance to try the OKI or Harris ones. Your comment about bus timings being *very* different for the 68020 was spot on. Signals that worked so well for me with the 68000 [AS*, DS*, etc.] weren't much help here. I discovered DBEN* (device buffer enable) on the 68020, and it is much closer, in the timing diagrams, to data bus stable. I ORed it with the 82C55 select to drive CS* on the 82C55, and things started acting more normal. BUT, there were still persistent bit errors on the interface. In checking the connections between port B of the 82C55 and the IDE/compact flash header, I discovered two bits were completely unconnected!!! They are clearly present in the schematic. I've had this problem before with KiCAD [or is it the "FreeRouter"?] dropping connections, but never this egregious. When I bodged these two bits, the compact flash started to work more normally. There were still a few glitches (at 25 MHz), so I dropped back to 20 MHz, and it seems to be very stable now. I don't have any oscillators between 20 and 25 MHz. Have to get some. 22 or 23 might work?
You would laugh at the final result -- just a big mess of bodges and even one IC hanging off of the side of the board (in mid-air)!
Anyway, I'm quite discouraged about the KiCAD/FreeRouter situation. On a complex board like this one there are over 400 connections. Do every single one of them have to be checked? What a pain!
Roger
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