| Zero Glue logic 6502 SBC [message #9629] |
Mon, 17 January 2022 21:17 |
plasmo
Messages: 916
Registered: March 2017
Location: New Mexico, USA
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I have designed a very simple 6502 SBC, ZG6502, that has no glue logic. The homepage is here:
https://www.retrobrewcomputers.org/doku.php?id=builderpages: plasmo:6502:zg6502r1:zg6502r1home
ZG6502 is a traditional 6502 computer with 6502 CPU, RAM, EPROM, and a serial port. The unusual feature is two cascaded MCP130 reset supervisors. At power cycle the primary reset supervisors is in reset for the nominal 350mS and holds the secondary reset supervisor in reset. When the primary reset supervisor releases its reset output, the secondary reset supervisor will remain in reset for another 350mS. The primary reset output is connected to 6502's reset while the secondary reset output is connected to chip select and output enable of EPROM. The cascaded reset logic enables EPROM for the entire 64K memory space for 350mS after 6502's reset is released. During this time, 6502 copies the contents of EPROM to RAM and then jumps to RAM and wait long enough for the secondary reset supervisor to negate its reset output. Afterward the memory map consists of RAM at 0x0-0x7FFF, serial port (W65C51) at 0x8000-0xBFFF, and no device from 0xC000-0xFFFF. Future I/O or memory devices may use the empty 16K space from 0xC000-0xFFFF.
The design is realized on 4"x4" 2-layer pc board. There are 3 RC6502 connectors for future expansion. The board is designed to fit PacTec CM5-125 enclosure.
Bill
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