Portions of the hardware and designs on this page are based on Grant Searle's original work , which was published with the following license: “By downloading these files you must agree to the following: The original copyright owners of ROM contents are respectfully acknowledged. Use of the contents of any file within your own projects is permitted freely, but any publishing of material containing whole or part of any file distributed here, or derived from the work that I have done here will contain an acknowledgement back to myself,Grant Searle, and a link back to this page. Any file published or distributed that contains all or part of any file from this page must be made available free of charge.”

Here is all you need to build this project.


This is the up-to-date version, including 5 CP/M variants and NASCOM Basic


This version uses 11 chips, and supports a 512k SRAM with 32k memory banks, which allows for banked systems and RAM-drives. The system may use a CF-card or a SD-card as mass memory, provided a suitable IDE interface board is used. The two serial interfaces provide TTL-level terminal access, which are intended to be used with USB or RS-232 converters.

5V power is provided by either the serial interface (USB) or using a separate power connector, which also may be used to power the IDE interface.

Schematics and Eagle files for a 80×100 mm PCB are included. These can be used to order the PCB itself with any on-line company (Seeed, DirtyPCB, EasyEDA etc)

All software (including ROM) was rewritten. it currently supports:

  • CP/M 2.2
  • Dos+ 2.5
  • CP/M 3.1
  • ZSDOS 1.1 / ZCPR2
  • ZPM3 /ZCCP

Each CP/M version supports 3 8MB drives (A:, B: and C:) as well as one 384 kB Ramdrive (M:).

A: B: and C: may be mapped on any of the available 8 MB segments (volumes) on the memory card, with a maximum of 253 (on a 2GB+ card). B: and C: are re-mappable in a running system using an included transient program MOUNT.COM.

Each of the volumes is bootable and an identical layout is used in all CP/M versions. The Ramdisk is not bootable, but an identical layout is used throughout.
The content of the Ramdisk will not change during reboots but will be erased when the board is powered down.

Essential volume maintenance tooling is provided in the system ROM monitor. This includes formatting and system transfer.

Building the board is straightforward. The UV-EPROM needs to be programmed with the ROM code. Only the 7400 chip which drives the clock needs to be of a HCT variety (74HCT00) all other chips can be LS, HC or HCT. The Z-80 and the SIO need to be 6 MHz versions in ether C-MOS or N-MOS (clock frequency is 7.3728 MHz)

It is suggested to mount the IDE connector under the board so a suitable CF or SD interface board can be mounted without any cabling. As the IDE interface is un-buffered, long cables and multiple connectors should be avoided.

The board is pre-jumpered for use with a 512 kByte SRAM. When a 128 kByte SRAM is used the thin bridge under the board should be cut and a jumper placed.

There are two software installation methods A “long” method, using the boards monitor and a “quick” method, copying a base image onto the memory card you wish to use. Please read the installation instructions.

builderpages/rhkoolstar/sbc-2g-512.txt · Last modified: 2016/10/19 09:20 by rhkoolstar
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