Table of Contents
Experimenting with SC114
SC114 is an economical easy-to-build Z80 SBC designed by Steve Cousin. It consists of a Z80, 128KB RAM, and 32K ROM. It communicated to the outside world via bit-bang serial port nominally at 9600bps with 7.37MHz CPU clock. I was given two blank SC114. One was heavily modified to run 29.5MHz, the other (as recorded here) preserved the original design intent of SC114 but was slightly modified for my own development environment.
Adding VGARC to SC114 was discussed on this Google forum topic.
Reset modification
A MCP130 reset supervisor is added instead of resistor-capacitor circuit for more reliable power-on reset operation.
Serial port modification
The serial connector is modified to accommodate direct plug in of a 6-pin CP2102 USB-to-serial adapter
Flash substitution
Instead of using OTP flash as specified in SC114 bill of materials, the reprogrammable W27C512 is used. Since A15 of W27C512 is tied high, the flash programming file needs to add an offset of $8000.
14.7MHz clock
SC114 design can easily accommodate faster clock. 14.7MHz works just fine which is twice the standard 7.37MHz clock, so the serial communication is also doubled to 19.2Kbps