SBC6120 RBC Edition

sbc6120-rbc-edition-v100-assembled.jpg
SBC6120-RBC Edition Rev 1.00 Assembled

sbc6120-rbc-edition-v100-pcb.jpg
SBC6120-RBC Edition Rev 1.00 PCB

SBC6120 Introduction

In the late 90s, Robert Armstrong of Spare Time Gizmos designed a single board computer using the Harris HD-6120 CMOS “PDP-8 on a chip”.

Bob no longer offers new SBC6120 kits or boards, be he has made the design documentation, source code, and design files for the SBC6120 available for others to use at the Spare Time Gizmos SBC6120 Page with the following license:

All SBC6120 files are Copyright (C) 2001-2003 by Spare Time Gizmos.

All SBC6120 documentation files including the schematics and the SBC6120 User's Guide, are covered under the terms of the GNU Free Documentation License. Permission is granted to copy, distribute and/or modify these files under the terms of the GNU Free Documentation License, Version 1.1 published by the Free Software Foundation; with no invariant sections; with the front cover text “Portions Copyright (C) 2001-2003 by Spare Time Gizmos” and our URL, and with no back cover text.

All SBC6120 software and firmware including, but not limited to, BTS6120, PALX, GAL programming, and the VM01/ID01 handlers, are covered under under the terms of the GNU General Public License. Permission is granted to copy, distribute and/or modify these files under the terms of the GNU General Public License as published by the Free Software Foundation, version 2.

In general, these licenses will allow you to use the SBC6120 design for any purpose you choose, including to create derivative works. If you choose to distribute the SBC6120 design or a derivative, then you must make your distribution, including source files, free to anyone.

The SBC6120-RBC Edition is a hobby project of the RBC Community, which has no official association with Robert Armstrong/Spare Time Gizmos beyond the use of the design and materials that he has made available

Why A RetroBrew Computers Edition?

The SBC6120-RBC Edition is a re-implementation of the SBC6120 design into KiCAD as a 2-layer PCB layout. The original 4-layer PCB is relatively expensive to fabricate, which makes it difficult to distribute as a “hobbyist PCB” in the way the other RBC ECB, S-100, etc boards are distributed. Having the schematic and PCB layout in KiCAD will also benefit other community members who might want to make use of portions of the design which Bob has graciously made available.

Hardware Documentation

Board: sbc6120-rbc-edition-1.10-brd.pdf

Schematic: sbc6120-rbc-edition-1.10-sch.pdf

KiCAD EDA/Gerber Manufacturing Files: sbc6120-rbc-edition-1.10-kicad-gerbers.zip

SB6120-RBC Edition Complete Archive: sbc6120-rbc-edition-archive-06feb2017.zip - contains:

  • The original STG SBC6120 User's Manual, Third Edition
  • .pdf & .txt file versions of this wiki page as of 06-Feb-2017 including addenda to the User's Manual specific to the RBC Edition (see below)
  • BOM generator Excel .xlsm file
  • The files required to program PLD/GALs and E(E)PROMs
  • KiCAD EDA, Gerber manufacturing, and .pdf board and schematic files for the SBC6120-RBC Edition Rev 1.10, which may be used to create other new designs or fabricate boards.
  • Copies of the original Spare Time Gizmos Design, Source, and Tools archives for the SBC6120
  • License files for all of the above.

Important note - if the RBC Edition Gerber files are used to fabricate PCBs, 2 oz copper PCBs should be used.

Revision History

Rev 1.10

Added C22 for additional de-coupling of IDE-CF adapter powered through Pin 20 of J2. This was a small manual copper change in KiCAD, so the rest of the board is identical to the tested Rev 1.0 board. This version has been constructed by 2 members & tested with both an original STG FP6120 & a variant of the IOB6120 at the same time to verify functionality.

Rev 1.00

Re-routing & numerous tweaks based on testing of 0.99. Fixed EEPROM address line order issue. 1 board assembled for final testing prior to large-scale fabrication. This revision was tested with an original STG FP6120 front panel.

Rev 0.99

6 Prototype boards distributed to RBC Forum members for initial testing. Required custom 'scrambled' ROM files due to EEPROM address line mix-up & 2 point-to-point jumper wire fixes. This revision was tested with on original STG FP6120 front panel.

SBC6120-RBC Edition Rev 1.10 Differences from Spare Time Gizmos SBC6120

Several changes have been made from the original SBC6120. Thanks to the 0.99 board builders for suggesting some of these:

  • The board was re-routed as a 2-layer PCB using KiCAD & Freerouting.net open-source router. VCC and GND flood fill planes are included on the top and bottom of the board, respectively.
  • The SRAM chips were changed from Qty 3 64k x 4-bit HM6208 to Qty 2 128k x 8-bit AS6C1008, which should be more available to builders.
  • The post LED display was changed to allow the use of 4 individual square LEDs + resistors. The integrated LEDs display specified in the original STG BOM can still be used by installing jumper wires in place of the individual resistors. The LEDs moved slightly in position along the edge of the board.
  • The reset switch was changed to a less expensive/more commonly available part/footprint. It also moved slightly in position along the edge of the board.
  • A new jumper J15 was added which allows either 27C256 EPROMs or 28C256 EEPROMs to be used.
  • A new jumper J16, fuse F2, and capacitor C22 were added which allow +5V power to be provided to Pin 20 of the IDE connector. These components are optional and allow some CompactFlash → IDE adapters to be powered directly by the board.
  • TP1 was changed to J17, which includes the original /RESET test point and a GND pin to allow for an external, case-mounted reset switch to be connected if desired.
  • A minor schematic error on the expansion connector of the original STG boards was corrected. J4, pin 10 was connected to pin 2 of the HD-6120 - signal DMAGNT - instead of the correct CPU pin 31 with signal INTGNT. This signal is not used by either of the existing expansion boards (FP6120 & IOB6120) so compatibility with these boards will be maintained.

Unchanged items include:

  • Positions of all external interface connectors, mounting holes, etc.

User's Manual Replacements/Addenda for RBC Edition

Robert Armstrong produced an excellent User's Manual for the SBC6120 & the corresponding BTS6120 ROM monitor. It describes essentially all aspects of the hardware and software in great detail. Rather than recreating all of this content, the sections of this wiki page below override/update the corresponding sections SBC6120 User's Manual, Third Edition with information specific to the SBC6120-RBC Edition Rev 1.10. Builders are strongly recommended to review the User's Manual and the Replacements/Addenda below prior to starting their build!

2 Assembly

2.2 Parts Selection

2.2.1 SRAMs

The SBC6120-RBC Edition uses two 32-pin, 128k x 8-bit, 55ns SRAM chips (only the lower 64k of each RAM chip is used). Boards have been tested with Alliance AS6C1008-55PCN chips; either AS6C1008-55PCN (commercial temperature range) or AS6C1008-55PIN (industrial temperature range) will work fine. Other SRAMs with a matching 128k x 8-bit organization and pinout may also work, but have not been tested.

2.2.2 E(E)PROMs

Two 8-bit width E(E)PROMs are used to hold the BTS6120 ROM monitor and bootstrap. The latest versions of BTS6120 have exceeded the size that will fit in 8K byte ROMs, so 32K byte 27C256 EPROMs or 28C256 EEPROMs should be used. There are slight differences between in the routing of the address lines between EPROMs and EEPROMs so both chips must be of the same type and the two jumpers on J15 must be set correctly for the type of chips being used.

Boards have been tested using AT28C256-15PC 150ns EEPROMs, AT28C256-25PC 250ns EEPROMS, and 27C256 150ns EPROMs.

2.2.6 LED Display

There are two options for the LED POST code display:

  1. RetroBrew Style - Install 4 square LEDs (D2..D5) with individual current limiting resistors (R11..R14)
  2. Spare Time Gizmos Style - Install the LED display with internal resistors as used in the original Spare Time Gizmos boards, and install 0-ohm shunts in place of R11..R14. Do not substitute an integrated LED display without the internal resistors!

RetroBrew style POST display installed in a Rev 1.00 board:

Spare Time Gizmos style post display installed in a Spare Time Gizmos board:

2.2.7 Fuses

All content in the original User's Manual for Fuse F1 still applies. The recommended picofuse in the Parts List has been changed to a .750A fuse to allow additional current draw without blowing if a CF→IDE adapter is powered from Pin 20 of the IDE connector.

The CF→IDE power picofuse (F2) is optional and only needs to be installed if +5V power is desired on Pin 20 of the IDE connector to power a CF→IDE adapter without needing an additional molex connector. J16 must also be installed to enable this option. Do not install F2/J16 unless you are absolutely sure you want +5V to be present on IDE pin 20!

The recommended CF→IDE Adapter is the Syba SD-CF-IDE-DI IDE to CF Adaptor, Direct Insert, which allows for power to be provided to the CF card via Pin 20 of the IDE connector. Purchase links: SD-CF-IDE-DI @ Newegg.com SD-CF-IDE-DI @ Amazon.com

2.6 Connectors

2.6.2 IDE

The pinout for connector J2 has been updated as follows. All other content in the original User's Manual for J2 still applies.

Pin Signal PPI Pin Signal PPI
1 DRESET L PC5 2 GND
3 DD7 PB7 4 DD8 PA0
5 DD6 PB6 6 DD9 PA1
7 DD5 PB5 8 DD10 PA2
9 DD4 PB4 10 DD11 PA3
11 DD3 PB3 12 DD12 PA4
13 DD2 PB2 14 DD13 PA5
15 DD1 PB1 16 DD14 PA6
17 DD0 PB0 18 DD15 PA7
19 GND 20 N/C OR +5V*
21 N/C 22 GND
23 DIOW L PC4 24 GND
25 DIOR L PC3 26 GND
27 N/C 28 N/C
29 N/C 30 GND
31 N/C 32 N/C
33 DA1 PC1 34 N/C
35 DA0 PC0 36 DA2 PC2
37 CS1FX L PC6 38 CS3FX L PC7
29 DASP L4 40 GND

4 Signal not connected to the PPI, however it may be tested by the SDASP (64118) IOT
* NC is default for IDE devices, +5V to power CF→IDE adapters can be enabled by installing F2 & J16

2.7 Jumpers

2.7.3 EPROM/EEPROM Selection

J15 has been added to allow for selection of either EPROM or EEPROM chips for U9 & U10:

Jumper setting for 27C256 EPROMs:

Jumper setting for 28C256 EEPROMs:

2.7.4 IDE Connector Pin 20 Power

J16 is an optional jumper which sends +5V power to J2, pin 20. Installing this jumper allows for certain brands/models of CompactFlash→IDE adapters to be powered through J2 without the need for an additional molex connector.

2.7.5 Case-Mounted Reset Switch

J17 contains both the original TP1 connected to RESET L and a GND pin. An external case-mounted reset switch may be connected to J17 if desired.

B. Parts List

The parts list in the User's Manual still applies, with the following changes/additions:

Reference Designator Manufacturer Part Number Supplier Stock Number Description
D2, D3, D4, D4 Lite-On LTL-433Y Jameco 2186267 2mm x 5mm rectangular LED
R11, R12, R13, R14 150 ohm 5% 1/8W carbon resistor
U6, U7 Alliance AS6C1008-55PCN Digi-Key 1450-1017-ND 128k x 8-bit SRAM
U8 <Deleted>
F2 Bel Fuse 0697H0315-01 Digi-Key 0697H0315-01 315 mA slow blow picofuse
J15 Jameco 115027 2×2 pin header
J16, J17 Jameco 108338 2 pin header
S1 Panasonic EVQ-PF206K Digi-Key P12210S-ND Pushbutton switch
Qty 5 Jumpers 3M 969102-0000-DA Digi-key 969102-0000-DA Needed for J10, J11..J14 (install only 1), 2x J15, J16

In addition, there is a new Digi-key based BOM which allows the builder to select the various 'options' they wish to have & creates an overall BOM to order in a single order from Digi-key to save time. Options include:

  • RetroBrew Computers style or Spare Time Gizmos style POST display
  • Machine tool sockets, dual wipe sockets, or sockets provided by the builder
  • Include or omit parts to power CF→IDE Adapter
  • Include or omit parts for serial port cable
  • Include or omit un-programmed GALs & EEPROMs
  • 5 MHz, 8 MHz, or 5 & 8 MHz CPU oscillators

The BOM builder can be downloaded here - sbc6120-rbc-edition-bom-generator-5feb2017.xlsm

C. Silk Screen

E. BST6120 Enhancements

The following enhancements have been added to the BTS6120 ROM Monitor subsequent to the writing of the User's Manual, Third Edition:

  • Persistent Partition map - if ramdisk memory is installed via an IOB6120 or other hardware (e.g. the Spare Time Gizmo's ramdisk board), the partition map is saved and restored from it.
  • Partition Compare (PE) command - checks two partitions for equality, for example after a PC (partition copy) command.
  • IDE boot unit - in previous versions, the Boot command would always boot from partition 0. This has been changed to boot from the partition mapped as unit 0 using the PM command.
  • Extension ROM support - a system for extending BTS6120 has been added. When the system starts, a check is made for an extension ROM, and if found, it is installed. The extension ROM can add commands to BTS6120, add function calls for application program use, or modify (hook) existing functions in the EPROMs.
  • Flash Download (FL) command - if extension ROM as described above exists, it can be initialized by downloading a file over the serial port. Currently only 28Fx00 ROMs are supported, but 29Fx00 types could be used with minor changes.
  • Disassembler - adds a new X command to disassemble from memory, and enhances the TRace command to display mnemonics as you step through a program.
  • SCope command – adds a new SC command that changes the function of the DEL key to a backspace, much like OS/8’s SET TTY SCOPE.

Getting Started

Serial Terminal Settings

The serial protocol used by the BTS6120 ROM monitor and DEC's OS/8 are slightly different. In order to work seamlessly in both programs, the required serial terminal settings are 7 bits, mark parity, 1 stop bit - '7M1' at whatever baud rate has been selected on J11..J14.

OS/8 Disk Images

The quickest way to get started with the SBC6120 once it is completed is to use a CF card in a CF→IDE adapter, and to write a binary image file directly to the CF card using a card reader and a modern PC. Either the 'Win32DiskImager' program in Windows or the 'dd' command in Linux can be used to write the image to the card.

2 main disk images are available:

Assistance in creating new disk images/better documenting the disk image contents would be greatly appreciated. These images are, of course, completely compatible with the original Spare Time Gizmos boards.

Running Adventure

The classic text adventure game Colossal Cave Adventure is located on the 'sbc6120-firstrun' disk image and can be run by booting OS/B ('B' command in the BST6120 monitor) executing the following commands at the OS/8 '.' prompt:

.R FRTSENTER
*ADVENTESC

At this point Adventure should load & instructions will be presented. This version of the game is from Rick Murphey's OS/8 Adventure Page

Additional Useful PDP-8 & SBC6120 Resources

File List

FilenameFilesizeLast modified
sbc6120-rbc-edition-1.10-brd.pdf638.5 KiB2016/10/15 13:39
sbc6120-rbc-edition-1.10-kicad-gerbers.zip1.7 MiB2016/10/15 16:01
sbc6120-rbc-edition-1.10-sch.pdf535.2 KiB2016/10/15 13:39
sbc6120-rbc-edition-archive-06feb2017.zip4.8 MiB2017/02/07 01:55
sbc6120-rbc-edition-bom-generator-5feb2017.xlsm45.6 KiB2017/02/05 20:55
sbc6120-rbc-edition-j15-27c256.png40.6 KiB2016/09/11 14:15
sbc6120-rbc-edition-j15-28c256.png41.0 KiB2016/09/11 14:15
sbc6120-rbc-edition-j15.png43.4 KiB2016/09/11 14:16
sbc6120-rbc-edition-j16.png36.1 KiB2016/10/15 14:58
sbc6120-rbc-edition-j17.png11.2 KiB2016/10/15 14:58
sbc6120-rbc-edition-silkscreen.png310.5 KiB2016/10/15 14:57
sbc6120_firstrun_25sept2016.img4.0 MiB2017/02/05 17:19
sbc6120_os8_games_18jun2016.img4.0 MiB2017/02/05 17:19
sbc6120_users_manual_3rd_ed.pdf1.7 MiB2016/09/11 13:24

Rev 0.99 Prototype Boards

As part of the development of this board, six Rev 0.99 prototype boards were fabricated and distributed to community members for testing. Some notes on these boards can be found on the Prototypes page

License

This wiki page sbc6120-rbc-edition is covered under the terms of the GNU Free Documentation License. Permission is granted to copy, distribute and/or modify this file under the terms of the GNU Free Documentation License, Version 1.1 published by the Free Software Foundation; with no invariant sections; with the front cover text “Portions Copyright (C) 2016 Andrew Bingham; Portions Copyright (C) 2001 by Spare Time Gizmos” and the URLs www.retrobrewcomputers.org & www.sparetimegizmos.com, and with no back cover text. A copy of this license is included in sbc6120-rbc-edition-archive-06feb2017.zip in the file FDL.TXT.

boards/sbc/sbc6120-rbc-edition/start.txt · Last modified: 2017/02/07 01:47 by admin
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