The SBC-188 version 3 is an update and improvement to the earlier board. This board is better suited for 80C188 operation at 25Mhz.

• Memory size is increased to 1Mb, allowing a full DOS memory of 640K plus high memory blocks.
• The 82C55 controller is configured as a PPIDE (parallel port IDE) connection; it works with hard disks as well as CF cards.
• An IDE8 connector directly on the CPU data bus is added.
• The floppy controller and connector are present. Drives may be 360K, 1.2M, 720K, or 1.44M.
• Status LEDs indicate the sequence of boot-time P.O.S.T. diagnostics.
• The Serial I/O UART connector is altered to support RTS/CTS protocol, or crossed to DTR/DSR protocol.
• The board may be used stand-alone by powering it from the IBM 4-pin peripheral connector. In this case a terminal or terminal-emulator is attached to the serial connector.
• The board may also be inserted into any RetroBrew ECB backplane to connect to peripheral boards, including the 4MEM, DualSD, ColorVDU, VGA3, etc.
• ROMs supported may be 32Kb, 64Kb, 128Kb, or 256Kb. The current BIOS recommended is 64Kb.
• The board runs MSDOS 5.0, MSDOS 6.22, and IBM PCDOS 2000 (7.0).
• Two versions now exist: 3.1 (requiring errata), and 3.2 (jumpers replace errata). The circuits are identical.
• The 3.2 board now has PLCC and PQFP versions. The circuits are identical, as are the board layouts.

The boards referred to as 1.0 and 2.0 are collectively known as SBC-188v1 – they both use the Version 1 circuitry. 1.0 required a circuit update to correct a peripheral select problem and that layout became the 2.0 board. With the update, the 1.0 and 2.0 have identical circuits; hence, the adoption of the “SBC-188v1” name when the 3.0 board was produced.

The 3.0 board adds new features, and has gone through two updates, 3.1 and 3.2. These boards are collectively known as SBC-188v3. All 3.0 boards should be updated to at least 3.1.

At the suggestion of a user, the PLCC-68 can be replaced by a PQFP-80 (14x20mm) chip. This board is the 3.2-005 board, with a prefix of “Q”; hence, “Q3.2-005”. There are no circuit changes, only the substitution of the 80C188 in a different package. References to the “SBC-188” means the PLCC-68 CPU package. Any reference to the alternate PQFP-80 package will have at least a “Q” (or PQFP) in the name. The PQFP version uses the same GAL 22v10 chips and equations as the PLCC version.

Here is the completed 3.2 version of the board:

The bare 3.2 board layout, showing updated area:

Finished board, ROM in raised ZIF socket for BIOS development & checkout:

The BOM for the 3.1 and 3.2 boards are the same except for the addition of the 3×2 pin_array.

The GAL .JED files are the same. Use sbc-188v3-gal-3.0-002.zip (above).

BIOS software is here.

Version 3 of the SBC-188 is designed to support DMA access to main SRAM memory by controllers on boards on the ECB bus. Documentation for DMA access for anyone interested in creating an I/O board that uses DMA is available above. There is at this time no such ECB board; hence, the document may not be of general interest.

The two types of Super Capacitors may be used for the RTC/NVRAM backup. Second photo shows 13.5 mm diameter cap; third photo shows a vertical mount. I used this 1.5F cap, and consider that value too large: I had to leave the board powered up overnight to get enough charge in the cap to bring the voltage above 2 volts. The good range would be 0.22F up to 0.47F. The cap in photo 2 is 0.33F.

Left photo shows the normal jumper setting for the RS-232 interface to allow RTS/CTS line protocol. The right photo shows an alternate setting which crosses RTS-CTS to DTR-DSR. This is for terminals that use the obsolete DTR/DSR line protocol. However, the programming within the UART is still RTS/CTS. If you have any doubt about which setting to use, use the one on the left.

The left photo shows a rather odd jumper (P601) labeled “INT2/INTA0”. It should always be set to “INT2” (1-2); the other setting (2-3) is for a possible future use. In the middle is jumper (K601), the “Legacy/Kontron” Reset setting. In the Legacy setting (1-2) reset is put out on DIN pin C31; with the Kontron setting, DIN pin C31 is a Reset switch input to the CPU board, and the Reset signal is correctly put out on DIN pin C26 (RESOUT). All peripheral boards should also use the Kontron setting. (Kontron, a German firm, manufactured one of the earliest Zilog Z80 computers that used the 96-position DIN connector, and this was the intended pin usage.) The right photo shows the rearranged area for the 3.2 board. The INT2 and Kontron jumpers are to the right. The 3 possible interrupts that may be generated may be connected or disconnected at the 3×2 header to the left (right photo, 3.2 board). The FDC interrupt is connected if the Floppy Disk controller is present. The two IDE interrupts are generally not connected since the current BIOS code does not look for those interrupts. They are available for use by software other than the BIOS. The presence of the 3×2 header removes the need on the 3.1 board to bend pins up on the 74LS05 to disconnect these last 2 interrupts.

The middle and right photos also show the IBM peripheral connector, which may be used to power the board as a truly Single Board Computer, SBC-188.

The above jumpers are common to the 3.1 and 3.2 boards and are in the exact same locations.

1. P804 2×1 optionally connects VCC power to pin 20 on the IDE8 shrouded header.
2. K402 3×1 selects whether 32-pin Flash (1-2) or 32-pin EPROM (2-3) is used as the BIOS ROM. If the BIOS ROM is 28-pin, this jumper has no effect. In the case of 32-pin Flash ROM, leaving this jumper off will Write Protect the Flash memory.
3. K401 3×1 selects between 32-pin ROM (1-2) or 28-pin ROM (2-3). In the case of 28-pin ROM it connects VCC to pin 30 of the socket and the 28-pin chip does not use pins 1,2, & 31,32.
4. K801 3×1 chooses whether GND (1-2) or VCC (2-3) is connected to pin 20 of the Parallel Port IDE connector. It may be left off if pin 20 is to have no connection.

K401 is generally set for 32-bit Flash, so it is the only jumper here that is not in its usual (default) position.

R601 determines the brightness of the Red/Green (halt/run) D601 LED. It is suggested to put this resistor in a socket, since the brightness of the LED may need to be adjusted. 68 ohms is common, but 47 ohms (dim LED) up to 270 ohms (bright LED, attenuated) have been used.

This is a boot screen using a Wyse terminal for keyboard input and screen output:

This is the boot screen with the SBC-188 v.3 used with the VGA3 board. An IBM PC keyboard is the input device, and a VGA capable LCD monitor is used for output:

The SBC-188 is a Single Board Computer using the 80C188 CPU. General features include:

• CPU 80C188-16 w/512K SRAM
• UART 16c550
• ParPort 8255
• Floppy Controller WD37C65B
• ECB RetroBrew bus for expansion

• A 4 Megabyte memory expansion board is available.

This is the layout of the rev. 2.0 board: (anyone have a photo? I still run the 1.0 board)

Please use this space to add any notes/comments on this board that don't fit into the above sections. (Periodically, these comments may be re-arranged to be better incorporated into a new revision of the wiki page.) Please sign your comments using the wiki “Insert Signature” feature!

This is a boot screen using a Wyse terminal for keyboard input and screen output:

This is the boot screen with the SBC-188 v.3 used with the VGA3 board. An IBM PC keyboard is the input device, and a VGA capable LCD monitor is used for output:

The SBC-188 is a Single Board Computer using the 80C188 CPU. General features include:

• CPU 80C188-16 w/512K SRAM
• UART 16c550
• ParPort 8255
• Floppy Controller WD37C65B
• ECB RetroBrew bus for expansion

• A 4 Megabyte memory expansion board is available.

This is the layout of the rev. 2.0 board: (anyone have a photo? I still run the 1.0 board)

Please use this space to add any notes/comments on this board that don't fit into the above sections. (Periodically, these comments may be re-arranged to be better incorporated into a new revision of the wiki page.) Please sign your comments using the wiki “Insert Signature” feature!

The BOM for the 3.1 and 3.2 boards are the same except for the addition of the 3×2 pin_array.

The GAL .JED files are the same. Use sbc-188v3-gal-3.0-002.zip (above).

BIOS software is here.

Version 3 of the SBC-188 is designed to support DMA access to main SRAM memory by controllers on boards on the ECB bus. Documentation for DMA access for anyone interested in creating an I/O board that uses DMA is available above. There is at this time no such ECB board; hence, the document may not be of general interest.

The two types of Super Capacitors may be used for the RTC/NVRAM backup. Second photo shows 13.5 mm diameter cap; third photo shows a vertical mount. I used this 1.5F cap, and consider that value too large: I had to leave the board powered up overnight to get enough charge in the cap to bring the voltage above 2 volts. The good range would be 0.22F up to 0.47F. The cap in photo 2 is 0.33F.

Left photo shows the normal jumper setting for the RS-232 interface to allow RTS/CTS line protocol. The right photo shows an alternate setting which crosses RTS-CTS to DTR-DSR. This is for terminals that use the obsolete DTR/DSR line protocol. However, the programming within the UART is still RTS/CTS. If you have any doubt about which setting to use, use the one on the left.

The left photo shows a rather odd jumper (P601) labeled “INT2/INTA0”. It should always be set to “INT2” (1-2); the other setting (2-3) is for a possible future use. To the right is jumper (K601), the “Legacy/Kontron” Reset setting. In the Legacy setting (1-2) reset is put out on DIN pin C31; with the Kontron setting, DIN pin C31 is a Reset switch input to the CPU board, and the Reset signal is correctly put out on DIN pin C26 (RESOUT). All peripheral boards should also use the Kontron setting. (Kontron, a German firm, manufactured one of the earliest Zilog Z80 computers that used the 96-position DIN connector, and this was the intended pin usage.)

The right photo also shows the IBM peripheral connector, which may be used to power the board as a truly Single Board Computer, SBC-188.

The updated area on the 3.2 board is shown. P601 (INT2/INTA) is moved to be next to K601 (N8/Kontron). P805 (FDC, IDE8, PPIDE) takes over where P601 was located. It connects the interrupt outputs to the corresponding interrupt inputs on the CPU. FDC jumper is installed if the FDC controller is installed. If there is no FDC controller, then this jumper should be left off. If the IDE8 or PPIDE interfaces use interrupts, then the corresponding jumpers will need to be installed. Since the BIOS does not use interrupts on these interfaces, the normal setting will be with the jumpers off, as shown. This jumper block, P805, eliminates the 3.1 board errata, which requires disconecting the interrupts by bending up pins on U705 (74LS05).

This is a boot screen using a Wyse terminal for keyboard input and screen output:

This is the boot screen with the SBC-188 v.3 used with the VGA3 board. An IBM PC keyboard is the input device, and a VGA capable LCD monitor is used for output:

The SBC-188 is a Single Board Computer using the 80C188 CPU. General features include:

• CPU 80C188-16 w/512K SRAM
• UART 16c550
• ParPort 8255
• Floppy Controller WD37C65B
• ECB RetroBrew bus for expansion

• A 4 Megabyte memory expansion board is available.

This is the layout of the rev. 2.0 board: (anyone have a photo? I still run the 1.0 board)

Please use this space to add any notes/comments on this board that don't fit into the above sections. (Periodically, these comments may be re-arranged to be better incorporated into a new revision of the wiki page.) Please sign your comments using the wiki “Insert Signature” feature!

This is a boot screen using a Wyse terminal for keyboard input and screen output:

This is the boot screen with the SBC-188 v.3 used with the VGA3 board. An IBM PC keyboard is the input device, and a VGA capable LCD monitor is used for output:

The SBC-188 is a Single Board Computer using the 80C188 CPU. General features include:

• CPU 80C188-16 w/512K SRAM
• UART 16c550
• ParPort 8255
• Floppy Controller WD37C65B
• ECB RetroBrew bus for expansion

• A 4 Megabyte memory expansion board is available.

This is the layout of the rev. 2.0 board: (anyone have a photo? I still run the 1.0 board)

Please use this space to add any notes/comments on this board that don't fit into the above sections. (Periodically, these comments may be re-arranged to be better incorporated into a new revision of the wiki page.) Please sign your comments using the wiki “Insert Signature” feature!