The ECB 6x0x-ATX-6U (VME) board is a single board computer supporting the Motorola 6809, 6802, and MOS Technologly 6502, all at 2 Mhz . In addition to the processor, ROM, and RAM, this board includes all peripherals required for stand-alone operation including serial, parallel, Propeller-driven video output/keyboard input, and SD card storage. The board layout supports mounting in a standard ATX case and use of a standard ATX power supply connection, as well as attachment to other N8VEM peripheral cards via an ECB connector, in which case the board can fit in a 6U/VME chassis. Prototype testing has been completed and a first run of production Revision 2.00-013 boards are currently in fabrication.

This board is intended as a replacement for the previous set of 3 N8VEM 6x9x Host Processor, IO Mezzanine, and Bus Bridge cards with a single comprehensive design.

• Physical Layout
  • Board dimensions 160 mm x 233.35 mm (6.3 in x 9.2 in)
  • Standard 6U/VME board size with ECB connector
  • Drilled hole pattern for mounting in a standard ATX case and connector provided for ATX 20-pin power supply
• CPU Configurations
  • CPU_1 - MC68B09 @ 2 Mhz. Note this is not the 6809E. The -E suffix chip is electrically different
  • or
  • CPU_2 - MC68B02 or Rockwell/CMD 65C02 @ 2 Mhz. WDC 65C02 unofficially work with some modifications
• Memory Configuration
  • 512 Kb SRAM + 512 Kb Flash = 1 Mb total
  • Memory Management Unit implemented on the board (see Hardware Documentation below)
• Peripheral Devices
  • Propeller Terminal using Parallax Propeller P8X32A microcontroller
    • VGA Output
    • PS/2 Keyboard Input
    • SD Card Interface/Slot
    • Speaker Output
    • MAX232-driven RS-232 Port (driven by Propeller chip, used to program propeller EEPROM)
  • 65C51 Asynchronous Communications Interface Adapter (ACIA) + MAX232
    • Primary serial port
  • 2x 65C22 Versatile Interface Adapters (VIA0 and VIA1)
    • VIA0 Port A & B, VIA1 Port A available
    • VIA1 Port B is used to interface with DS1302 RTC.
  • 6821 Peripheral Interface Adapter (PIA)
    • PIA is utilized to interface with the Propeller P8X32A for the Propeller Terminal
  • 6840 Programmable Timer Module (PTM)
  • DS1302 Real Time Clock w/Battery Backup

Schematics Revision 2.00-013

Board Layer Plots Revision 2.00-013

For a detailed description of the Memory Management Unit operation, see Collossus.pdf

Orientation of connectors (aka top, right, above, etc) is described while holding the board such that the copyright notice is readable.

P25, TTL levels serial, pin 1 = lower left, above pin 16 of left MAX232

P31, RS232 levels serial, pin 1 = lower left, above pin 9 of left MAX232

P23, pin 1 = left = ground, pin 1 = right = ground this pin to activate, it is underneath “Power OK” LED D4 in the lower left corner

P22, pin 1 = left, see schematic. Its the active “pins” of the standard ATX connector that it is directly above

P24, pin 1 = lower left. top of board, about 2 inches from left edge.

Also see jumper K5

P29, pin 1 = lower left. TTL signals for both 6522 CA1,CA2, CB1, CB2 pins, and power and ground, upper left corner of board

Provides many parallel port signals, off the 6821 and 6522

P27, pin 1 = lower left, above pin 1 of leftmost 6522 or upper left corner of board.

P6, pin 1 = left, immediately under PS/2 keyboard socket and above the P12 Prop TTL

P11, pin 1 = lower left, above right side MAX232

Mostly for serial in circuit programming of the prop. Also see prop jumper JP5.

P12, pin 1 = left, near the PS/2 socket and underneath the P6 prop port plug

JP14, pin 1 = left = ground, pin 2 = right = ground this to reset, underneath pin 12 of left MAX232

Orientation of jumpers (aka top, right, above, etc) is described while holding the board such that the copyright notice is readable.

JP13, short this to force CTS on, underneath pin 5 of left MAX232

1-2 = 8 MHz, 3-4 = 4 MHz, 5-6 = 2 MHz, 7-8 = 1 MHz

P3. pin 1 = bottom, right edge of board and up 2 inches or near pin 21 of Propeller

JP2, grounds xtal pin, between 6809 and 6821 or near pin 39 of 6809

XK1, 1-2 = 6809 or 3-4 = 6502 or 5-6 = 6502 alternate?, pin 1 = top, near pin 19 of Propeller

XK2, 1-2 = 6802 or 2-3 = 6809/6502, pin 1 = up, near pin 15 of Propeller

XJ series, 1-2 = 6502 or 2-3 = 6802

XJ1, pin 1 = down, near pin 35 of 6502

XJ2, pin 1 = down, near pin 30 of 6502

XJ3, pin 1 = left, near pin 40 of 6502

XJ4, pin 1 = right, near pin 16 of the 29F040 flash memory

XJ5, pin 1 = left, near pin 1 of 6502

XJ6, pin 1 = down, near pin 40 of 6502

1-2 = Flash aka 29F040 or 2-3 = Eprom

K1, pin 1 = left, around pin 1 of flash socket

I do not understand what this does.

JP10, pin 1 = down, shorts PD0 to B_/INT, right of pin 21 of 6502

P2, enables MMU?, pin 1 =bottom, right edge of board and up one inch or near pin 21 of Propeller

K17, 1-2 = disable MMU on interrupt or 2-3 = clear MMU task reg on interrupt, near pin 18 of 6502

K5, 1-2 grounds pin 25 of parport or 2-3 applies 5 volts to pin 25 of parport, above pin 1 of 6551

JP3, grounds pin PD1 of the second 0xEDxx 6522, above pin 1 of the right or second 6522

JP5, 1-2 = serial bootloading or 2-3 = normal or prop plug bootloading, pin 1 = left, near pin 40 of 6809 or F1 fuse

JP9, shorts RTS and CTS, underneath pin 1 of right MAX232

JP8, shorts DTR and DSR, underneath pin 4 of right MAX232

JP15, 1-2 = default N8VEM style reset, 2-3 = Kontron style reset, right of pin 25 of 6502

JP1, short to connect RTC battery to ECB bus battery

See the PDF document “Dual SDcard I/O Board Configuration” available from the ECB Dual SDcard page or the google group, detailing how hundreds of different pinout SDcard sockets can be used

P8, pin 1 = bottom, top right edge of board

1-2 = CD1

3-4 = CD2

5-6 = CD3

7-8 = CD4

9-10 = WP2

11-12 = WP1

For example, a FCI 10067847 aka Digikey 609-3956-1-ND would require pads CD2 and WP1, aka short 3-4 and 11-12, so that would mean short the second from the bottom jumper and the top jumper.

I do not understand how this works

P5, pin 1 is lower left, connects 6840 timer pins together, underneath the parallel port

K6, pin 1 is left, 1-2 connects PTM_01 output to NMI if JP12 is shorted, 2-3 connects PTM_01 output to O1, above pin 1 of the SRAM

JP12, when shorted, connects PTM_01 output to NMI if K6 is optioned to do that, right of pin 24 of 6502

BOM ECB 6x0x-6U-013.txt - KiCAD Generated BOM

ECB 6x0x-6U.xlsm - Excel spreadsheet with vendor part numbers created by Alex.

Rockwell/CMD and Western Design Center 6502 CPUs have slight differences in pinout. The board was designed for Rockwell/CMD 6502 in order to make it compatible with 6802 processors. To use a Western Design Center W65C02S6TPG-14 simply obtain an extra 40 pin DIP machine pin socket, snip off pin 36, and solder a jumper from pin 35 to pin 36. Insert the WDC 6502 into the modified socket and insert the stack into the board. Details are available in the google group in a post on 2014-07-31 by AG5AT. The post by Ian May on 2014-08-01 details several other differences between Rockwell and WDC chips.

As designed the board uses MAX232 level shifters which require 1 uF charge pump capacitors. MAX232A can operate with 0.1 uF charge pump capacitors. If you want to install 0.1 uF caps instead of 1.0 uF caps, the ten caps to change are C44 C45 C46 C47 and C48 for the propeller serial port, and C90 C91 C94 C95 C96 for the ACIA serial port.

One example of a right angle ECB 96 pin connector which fits perfectly is the 650913-5 aka Digikey A29012-ND. Jameco 859430 are also reported to fit perfectly.

The specs for a speaker that fits perfectly are 12 mm dia, 6.5 mm aka 1/4 inch pin spacing. One example of a speaker known to fit is Digikey 668-1098-ND. Note that buzzers are sold in the same physical package as this speaker, and a buzzer includes a little DC operated beep oscillator inside the package. On this board, the propeller chip generates the AC sound, its driven as a speaker not constant DC driven like a doorbell buzzer. So buy a speaker not a buzzer.

The 32K “skinny DIP” ram should be 35 ns or so access speed. One proposed example is a Jameco 75037.

Need to include any notes here about logic series, which versions of ICs to use, etc. Prototype builders please provide feedback.

A distribution of the DOS/65 operating system and associated Propeller firmware for the 6x0x-ATX/6U board configured with the 6502 CPU can be found HERE. The DOS/65 distributions attached to this wiki page are for archive purposes only, and should not be used.

6x0x_flex9_27072014.zip - A distribution of the Flex9 operating system for the 6x0x-ATX/6U board configured with the 6809 CPU. (Updated July 27 2014)

There are not yet any required changes to the production rev. 2.00-013 PCBs. In the future if there are any required changes they will be documented here per board revision. This section should only contain modifications that are required to correct defects in the functionality of the board as intended by its designers (Andrew L. and John C.). There are currently no known defects.

There are not yet any optional, user-designed improvements/changes/modifications/substitutions. In the future if users identify any such items, they should be documented her per board revision. This section should contain optional modifications that enhance or extend the board and are applied at the discretion of and with the responsibility of the user.

In order to make the 6502 processor properly use the MMU, the jumpers need to be set in an “unusual” configuration. (See the DOS/65 repo readme for details) A future respin of this board should correct this by adding more appropriate jumper configurations for XJ6 and XK2.