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boards:ecb:zilog-peripherals:start [2019/11/29 09:29]
b1ackmai1er [Serial leads]
boards:ecb:zilog-peripherals:start [2021/06/29 08:33] (current)
b1ackmai1er
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 ===== Pictures ===== ===== Pictures =====
  
-[[https://​www.retrobrewcomputers.org/​lib/​exe/​fetch.php?​tok=6b48cf&​media=https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​boards/​ecb/​zilog-peripherals/​zilogperipheral1.jpg|{{https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​boards/​ecb/​zilog-peripherals/​zilogperipheral1.jpg?​direct&400x300  ​|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_boards_ecb_zilog-peripherals_zilogperipheral1.jpg}}]]+{{https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​boards/​ecb/​zilog-peripherals/gallery/​zilogperipheral1.jpg?​nolink&500x375|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_boards_ecb_zilog-peripherals_gallery_zilogperipheral1.jpg}}
  
 [[:​boards:​ecb:​zilog-peripherals:​gallery|Photo gallery]] [[:​boards:​ecb:​zilog-peripherals:​gallery|Photo gallery]]
- 
-=====   ===== 
- 
-=====   ===== 
  
 ===== Specifications ===== ===== Specifications =====
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 ===== Acknowledgments ===== ===== Acknowledgments =====
  
-The ECB ZILOG Peripherals board is based on a design presented in c't magazine in 1985 "​Datenverkehr - Die I/O-Karte fur den ECB-Bus"​ by Georg Umback. The original documentation for this project can be seen here: {{:​boards:​ecb:​zilog-peripherals:​zp_dart_sio_ct8504.pdf|:​boards:​ecb:​zilog-peripherals:​zp_dart_sio_ct8504.pdf}}+The ECB ZILOG Peripherals board is based on a design presented in c't magazine in 1985 "​Datenverkehr - Die I/O-Karte fur den ECB-Bus"​ by Georg Umback. The original documentation for this project can be seen here: [[:​boards:​ecb:​zilog-peripherals:​development|]]
  
-Andrew Lynch designed the current ​version with David Giles and Douglas Goodall assisting with testing on the SBC V1 & V2 respectively.+Andrew Lynch designed the Retrobrew ​version with David Giles and Douglas Goodall assisting with testing on the SBC V1 & V2 respectively.
  
 ===== Version ===== ===== Version =====
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 Details on prior versions can be can be found [[:​https:​www.retrobrewcomputers.org:​doku.php?​id=boards:​ecb:​zilog-peripherals:​changes|here.]] Details on prior versions can be can be found [[:​https:​www.retrobrewcomputers.org:​doku.php?​id=boards:​ecb:​zilog-peripherals:​changes|here.]]
- 
  
 ===== Hardware Documentation ===== ===== Hardware Documentation =====
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 ==== Schematics ==== ==== Schematics ====
  
-{{:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-schematics-2.0_002.pdf|:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-schematics-2.0_002.pdf}} +{{:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-schematics-2.0_002.pdf|:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-schematics-2.0_002.pdf}}
  
 ==== Board Layout ==== ==== Board Layout ====
  
-{{:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-board-2.0_002.pdf|:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-board-2.0_002.pdf}} +{{:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-board-2.0_002.pdf|:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-board-2.0_002.pdf}}
  
 ==== KiCad Files ==== ==== KiCad Files ====
  
-{{:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-kicad-2.0_002.zip|:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-kicad-2.0_002.zip}} +{{:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-kicad-2.0_002.zip|:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-kicad-2.0_002.zip}}
  
 ==== PCB Gerber files ==== ==== PCB Gerber files ====
  
-{{:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-gerbers-2.0_002.zip|:​boards:​ecb:​zilog-peripherals:​zilog_peripherals-gerbers-2.0_002.zip}}+{{:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-gerbers-2.0_002.zip|:​boards:​ecb:​zilog-peripherals:v2:​zilog_peripherals-gerbers-2.0_002.zip}}
  
-[[https://​www.retrobrewcomputers.org/​lib/​exe/​fetch.php?​tok=716cd0&​media=https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​builderpages/​b1ackmai1er/​ecb_zilog_peripherals.png|{{https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​builderpages/​b1ackmai1er/​ecb_zilog_peripherals.png?​direct&​710x436}}]]+==== PCB Parts List ====
  
 +{{:​boards:​ecb:​zilog-peripherals:​v2:​zilog_peripherals-partlist-2.002.txt|:​boards:​ecb:​zilog-peripherals:​v2:​zilog_peripherals-partlist-2.002.txt}}
  
 ==== Connectors ==== ==== Connectors ====
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 ===== Hardware Documentation ===== ===== Hardware Documentation =====
- 
  
 ==== Board address ==== ==== Board address ====
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 Visual guide for I/O address setting: Visual guide for I/O address setting:
  
-{{https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​boards/​ecb/​zilog-peripherals/​zilog-peripherals-jumpers.png?​nolink&​800x406}}+[[https://​www.retrobrewcomputers.org/​lib/​exe/​fetch.php?​tok=41fbe6&​media=https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​boards/​ecb/​zilog-peripherals/​zilog-peripherals-jumpers.png|{{https://​www.retrobrewcomputers.org/​lib/​plugins/​ckgedit/​fckeditor/​userfiles/​image/​boards/​ecb/​zilog-peripherals/​zilog-peripherals-jumpers.png?​direct&​800x406}}]]
  
 ==== Chip address ==== ==== Chip address ====
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 Next the Z80-DART/​SIO'​s clock pins need to be connected to PHI_X using header X6. For the fixed baud rate jumper pins 3-5 or 5-7 for channel A and 8-10 for channel B of header X6 (as in the photo). This assumes the above recommended modification has been made. Next the Z80-DART/​SIO'​s clock pins need to be connected to PHI_X using header X6. For the fixed baud rate jumper pins 3-5 or 5-7 for channel A and 8-10 for channel B of header X6 (as in the photo). This assumes the above recommended modification has been made.
  
-\\ +==== Serial ​Leads ====
- +
- +
-==== Serial ​leads ====+
  
 |   \\ X3 / X7 pin|   \\ Signal| ​  \\ DB-9M| ​  \\ DB-9F| ​  \\ Note| |   \\ X3 / X7 pin|   \\ Signal| ​  \\ DB-9M| ​  \\ DB-9F| ​  \\ Note|
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 |   \\ 9|   \\ GND|   ​| ​  ​| ​  | |   \\ 9|   \\ GND|   ​| ​  ​| ​  |
 |   \\ 10|   \\ n/c|   \\ n/c|   \\ n/c|   | |   \\ 10|   \\ n/c|   \\ n/c|   \\ n/c|   |
- 
-\\ 
- 
  
 ==== Z80-CTC ==== ==== Z80-CTC ====
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   * Refer to ROMWBW ctc.asm driver for example.   * Refer to ROMWBW ctc.asm driver for example.
  
 +To enable the CTC, ROMWBW must be rebuilt with the following custom configuration added:
 +
 +SBC_std_cust.asm
 +
 +<​code>​
 +CTCENABLE ​    ​.SET ​    ​TRUE ​   ; ENABLE ZILOG CTC SUPPORT
 +CTCBASE ​      ​.SET ​    ​$B0 ​    ; CTC BASE I/O ADDRESS
 +</​code>​
 +
 +Correct operation of the 50Hz interrupt timer can be confirmed with the TIMER.COM:
 +
 +<​code>​
 +TIMER /C
 +</​code>​
 +
 +[[https://​www.retrobrewcomputers.org/​lib/​exe/​fetch.php?​media=boards:​ecb:​zilog-peripherals:​ctctimer.gif|{{:​boards:​ecb:​zilog-peripherals:​ctctimer.gif?​direct&​392x108}}]]
  
 ==== Z80-PIO ==== ==== Z80-PIO ====
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 On X6 put a jumper on pins 2-4 to put the 153600Hz signal to channel 0. Using DBGMON send the following to the Z80-CTC. (Text in <font inherit/​inherit;;#​000000;;​inherit>​blue is what you type)</​font>​ On X6 put a jumper on pins 2-4 to put the 153600Hz signal to channel 0. Using DBGMON send the following to the Z80-CTC. (Text in <font inherit/​inherit;;#​000000;;​inherit>​blue is what you type)</​font>​
  
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B0 47</​font>''​ \\ +''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B0 47</​font>''​ \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B0 00</​font>''​ \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B1 27</​font>''​ \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B1 00</​font>''​
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B0 00</​font>''​ \\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B1 27</​font>''​ \\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B1 00</​font>''​+
  
 The first command sets channel 0 as a counter, the second sets the count value to 256. The output on pin 7 of the Z80-CTC should be 600Hz (153600 / 256). The third and fourth commands set channel 1 as a timer which divides the system clock by 65536. Given my setup has the CPU running at 4MHz the output on pin 8 of the Z80-CTC should be a bit over 61Hz (4000000/​65536). The outputs are not a square wave but a series of pulses and were too short to be picked up by my ancient logic probe. However they measured correctly on my frequency counter. An oscilloscope would be handy as well. The first command sets channel 0 as a counter, the second sets the count value to 256. The output on pin 7 of the Z80-CTC should be 600Hz (153600 / 256). The third and fourth commands set channel 1 as a timer which divides the system clock by 65536. Given my setup has the CPU running at 4MHz the output on pin 8 of the Z80-CTC should be a bit over 61Hz (4000000/​65536). The outputs are not a square wave but a series of pulses and were too short to be picked up by my ancient logic probe. However they measured correctly on my frequency counter. An oscilloscope would be handy as well.
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 ==== Testing the Z80-DART/​SIO ==== ==== Testing the Z80-DART/​SIO ====
  
-I am using a SIO/0 on my board. The DART uses the same register layout except the synchronous stuff is missing.\\+I am using a SIO/0 on my board. The DART uses the same register layout except the synchronous stuff is missing. \\
 Loopback test. Install a jumper between pins 3 and 5 of X7 to connect TxD with RxD of channel A. Using DBGMON send the following: Loopback test. Install a jumper between pins 3 and 5 of X7 to connect TxD with RxD of channel A. Using DBGMON send the following:
  
-\\ + \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 04</​font>'' ​ select write register 4 \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 46</​font>'' ​ x16 clock, 1 stop, no parity \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 01</​font>'' ​ select write register 1 \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 04</​font>'' ​ disable interrupts \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 03</​font>'' ​ select write register 3 \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 C1</​font>'' ​ 8 bits, no auto enables, receiver enable \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 05</​font>'' ​ select write register 5 \\ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 EA</​font>'' ​ DTR on, RTS on, enable transmit
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 04</​font>'' ​ select write register 4\\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 46</​font>'' ​ x16 clock, 1 stop, no parity\\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 01</​font>'' ​ select write register 1\\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 04</​font>'' ​ disable interrupts\\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 03</​font>'' ​ select write register 3\\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 C1</​font>'' ​ 8 bits, no auto enables, receiver enable\\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 05</​font>'' ​ select write register 5\\ +
-''><​font inherit/​inherit;;#​2980b9;;​inherit>​O B6 EA</​font>'' ​ DTR on, RTS on, enable transmit+
  
-\\+ \\
 Next check the status by Next check the status by
  
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 ''><​font inherit/​inherit;;#​2980b9;;​inherit>​I B4</​font>''​ ''><​font inherit/​inherit;;#​2980b9;;​inherit>​I B4</​font>''​
  
-and the result should be 40. If not then try again as it could be leftover crud in the receive buffer.\\+and the result should be 40. If not then try again as it could be leftover crud in the receive buffer. \\
 Once the loopback test is successful then take out the jumper in X7, put in your carefully constructed serial lead and try it with a terminal. Once the loopback test is successful then take out the jumper in X7, put in your carefully constructed serial lead and try it with a terminal.
  
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 A simple register test program is available (base address 0xB0): {{:​boards:​ecb:​zilog-peripherals:​2piotst.zip|:​boards:​ecb:​zilog-peripherals:​2piotst.zip}} A simple register test program is available (base address 0xB0): {{:​boards:​ecb:​zilog-peripherals:​2piotst.zip|:​boards:​ecb:​zilog-peripherals:​2piotst.zip}}
  
-\\+ \\
 At this stage you should have a functioning Zilog Peripheral Board. Combined with the SBC V2 you now have enough serial ports, timers and parallel ports to create a working MP/M system. Any takers? At this stage you should have a functioning Zilog Peripheral Board. Combined with the SBC V2 you now have enough serial ports, timers and parallel ports to create a working MP/M system. Any takers?
- 
  
 ==== Using the Z80-PIO with a Centronics printer. ==== ==== Using the Z80-PIO with a Centronics printer. ====
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 ==== Resources ==== ==== Resources ====
  
-{{filelist>​*&​style=table&​tableheader=1&​tableshowdate=1&​tableshowsize=1}}+[[:​https:​www.retrobrewcomputers.org:​doku.php?​id=boards:​ecb:​zilog-peripherals:​datasheets|Datasheets]] 
 + 
 +\\
  
  
boards/ecb/zilog-peripherals/start.1575037777.txt.gz · Last modified: 2019/11/29 09:29 by b1ackmai1er
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