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boards:ecb:usb-fifo:start [2017/03/20 04:26]
will
boards:ecb:usb-fifo:start [2017/03/26 16:59] (current)
will [Example Code]
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 On the PC the interface is presented as a standard USB serial interface (a "​Virtual COM port" on Windows, /​dev/​ttyUSB* on Linux) and can be used by any application normally used with standard serial ports. Note that although it presents as a serial port, the baud rate and other serial settings configured on the Virtual COM Port are ignored, it just provides an 8-bit clean path at whatever rate you can pump data in or out of it. On the PC the interface is presented as a standard USB serial interface (a "​Virtual COM port" on Windows, /​dev/​ttyUSB* on Linux) and can be used by any application normally used with standard serial ports. Note that although it presents as a serial port, the baud rate and other serial settings configured on the Virtual COM Port are ignored, it just provides an 8-bit clean path at whatever rate you can pump data in or out of it.
  
-The FT232H has a separate FIFO (first-in-first-out queue) for the receive and transmit directions. Each FIFO is 1KB in size. In the receive direction (PC to ECB) the operating system decides when to transmit data and can send up to 512 bytes in a single USB transferIn the transmit ​direction (ECB to PC) the FT232H ​will accumulate data until 512 bytes has been received, or some period of time (believed to be around 17ms) has passed since the last byte was queued, or when "send immediate"​ signal is given.+The FT232H has a separate FIFO (first-in-first-out queue) for the receive and transmit directions. Each FIFO is 1KB in size. Data is transferred ​to/from the FIFOs over the USB link in blocks of up to 512 bytes. ​A "send immediate"​ operation is supported which causes any queued data in the transmit ​FIFO to be sent over the USB link at the earliest opportunity,​ otherwise ​the FT232H ​may wait a short while to accumulate ​more data before performing ​transfer over the USB link.
  
 The board supports generating interrupts on either (or both) of two conditions: data waiting in receive FIFO, or space available in transmit FIFO. The interrupt can be routed to ECB lines NMI, INT, IR0–IR7. Enabling and masking of interrupts is under software control. The board supports generating interrupts on either (or both) of two conditions: data waiting in receive FIFO, or space available in transmit FIFO. The interrupt can be routed to ECB lines NMI, INT, IR0–IR7. Enabling and masking of interrupts is under software control.
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 |7 (0x80)|**RX_EMPTY:​** read-only \\ 0 if the receive FIFO contains queued data, \\ 1 if the receive FIFO is empty. \\ Any reads from the FIFO while it is empty will return junk values.| |7 (0x80)|**RX_EMPTY:​** read-only \\ 0 if the receive FIFO contains queued data, \\ 1 if the receive FIFO is empty. \\ Any reads from the FIFO while it is empty will return junk values.|
  
-The **INT_TX** and **INT_RX** bits in the Status Register ​control the conditions under which an interrupt ​will be requested. The **IRQ** bit always reflects if either condition is met regardless of the value of **INT_ENABLE**. The bus interrupt line will be asserted only when the **INT_ENABLE** bit is also set. In other words, ​the bus interrupt line is asserted only when **INT_TX** and/​or ​**INT_RX** are set, one or both of the relevant conditions ​is met, and **INT_ENABLE** is also set. Sofor example, software which wants to receive an interrupt when data arrives in the receive FIFO over USB should set both **INT_RX** and **INT_ENABLE**. If the interrupt line is shared ​with multiple devices the interrupt service routine can then check the **IRQ** bit to determine if the USB-FIFO card is requesting the interrupt ​before calling ​the USB-FIFO interrupt handler code.+Interrupts: Interrupt requests are controlled in two stages. ​The first stage is controlled by the **INT_TX** and **INT_RX** bits in the Status Register. Setting these bits to 1 causes ​an interrupt ​to be requested ​when the transmit FIFO has space available (**INT_TX**), or the receive FIFO contains data (**INT_RX**). The **IRQ** bit in the Status Register will be 1 only when either of these bits is set and the corresponding condition arisesThe second stage is the **INT_ENABLE** bit: When the **INT_ENABLE** bit in the Status Register ​is set, and the **IRQ** bit is 1, the bus interrupt line selected ​with jumper ​**J3** will be asserted ​to interrupt the CPU.
  
-When the USB cable is disconnected, ​**TX_FULL** =1 and **RX_EMPTY** =1 indicating (correctly!) that data cannot be transferred in either direction.+For example, software which wants to receive an interrupt when data arrives in the receive FIFO over USB should set both **INT_RX** and **INT_ENABLE**. If the interrupt line is shared with multiple devices the interrupt service routine can then check the **IRQ** bit to determine if the USB-FIFO card is requesting the interrupt before calling the USB-FIFO interrupt handler code.
  
-When the ECB machine ​is resetthe **INT_ENABLE**,​ **INT_TX**, **INT_RX** and **GPIO_IN** bits are all reset to 0. The USB connection is **not** reset (ie the virtual serial device ​will remain connected).+When the USB cable is disconnected, **TX_FULL** and **RX_EMPTY** will both be set, indicating that data cannot be transferred in either direction.
  
 +When the ECB machine is reset, the **INT_ENABLE**,​ **INT_TX**, **INT_RX** and **GPIO_IN** bits are all reset to 0. The USB connection is **not** reset (ie the virtual serial device will remain connected).
 ===== ECB Card Jumpers ===== ===== ECB Card Jumpers =====
  
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 |J2|2×6 0.1" header|TE Connectivity part 5-826632-0: 2×50 contact breakaway header strip (Farnell order code 3418560)| |J2|2×6 0.1" header|TE Connectivity part 5-826632-0: 2×50 contact breakaway header strip (Farnell order code 3418560)|
 |J3|2×10 0.1" header|TE Connectivity part 5-826632-0: 2×50 contact breakaway header strip (Farnell order code 3418560)| |J3|2×10 0.1" header|TE Connectivity part 5-826632-0: 2×50 contact breakaway header strip (Farnell order code 3418560)|
-|U1, U3, U9|74LS244|TI SN74LS244N (Farnell order code 1739688)|+|U1, U3|74LS244|TI SN74LS244N (Farnell order code 1739688)| 
 +|U9|74AHCT244 (preferred) or 74LS244|TI SN74AHCT244N (Farnell order code 1752769)|
 |U2|74LS245|TI SN74LS245N (Farnell order code 1106085)| |U2|74LS245|TI SN74LS245N (Farnell order code 1106085)|
 |U4|74LS688|TI SN74LS688N (Farnell order code 1470949)| |U4|74LS688|TI SN74LS688N (Farnell order code 1470949)|
 |U5|74LS38|TI SN74LS38N (Farnell order code 1470758)| |U5|74LS38|TI SN74LS38N (Farnell order code 1470758)|
-|U6|74LS139A|TI ​SN74LS139AN ​(Farnell order code 9592296)| +|U6|74AHCT139 (preferred) or 74LS139A|TI ​SN74AHCT139N ​(Farnell order code 1741539)| 
-|U7, U11|74LS32|TI SN74LS32N (Farnell order code 1740030)|+|U7, U11|74ACT32 (preferred),​ 74AHCT32 (untested but should work) or 74LS32|TI SN74ACT32N (Farnell order code 1739969), TI SN74AHCT32N (Farnell order code 1749941) or TI SN74LS32N (Farnell order code 1740030)|
 |U8|74LS175|TI SN74LS175N (Farnell order code 1607731)| |U8|74LS175|TI SN74LS175N (Farnell order code 1607731)|
 |U10|Adafruit FT232H Breakout (product 2264)|Mouser order code 485-2264, Digikey order code 1528-1449-ND| |U10|Adafruit FT232H Breakout (product 2264)|Mouser order code 485-2264, Digikey order code 1528-1449-ND|
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 |(qty 2)|16 pin DIP IC socket|TE Connectivity 1-2199298-4 (Farnell order code 2445622)| |(qty 2)|16 pin DIP IC socket|TE Connectivity 1-2199298-4 (Farnell order code 2445622)|
 |(qty 3)|14 pin DIP IC socket|TE Connectivity 1-2199298-3 (Farnell order code 2445621)| |(qty 3)|14 pin DIP IC socket|TE Connectivity 1-2199298-3 (Farnell order code 2445621)|
 +
 +\\
 +
  
 ===== Notes on Construction ===== ===== Notes on Construction =====
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 **Important note on R3, C12: **Footprints are provided for these components but they should not normally be required. **No component** should be fitted at **C12**. A **wire jumper** should be fitted at **R3**. **Important note on R3, C12: **Footprints are provided for these components but they should not normally be required. **No component** should be fitted at **C12**. A **wire jumper** should be fitted at **R3**.
  
-The FT232H ​write signal is active on the falling edge of the signal, instead of the standard rising edge. To ensure the data signals ​are steady for long enough to meet its setup time requirements,​ the write signal is delayed by routing it through a few gates in U3 and U7. R3 and C12 can form an LC circuit used to extend this delay if required. Alternatively the delay can be shortened by omitting the wire jumper at R3 and connecting U3 pin 17 to U3 pins 5, 7 or 13. Testing indicates that the standard delay should suit all current Retrobrew Computers systems and so the LC circuit components should not be required.+The FT232H ​/​WRITE ​signal is active on the falling edge of the signal, instead of the standard rising edge. To ensure the data lines are steady for long enough to meet its setup time requirements,​ the write signal is delayed by routing it through a few gates in U3 and U7. R3 and C12 can form an LC circuit used to extend this delay if required. Alternatively the delay can be shortened by omitting the wire jumper at R3 and connecting U3 pin 17 to U3 pins 5, 7 or 13. Testing indicates that the standard delay should suit all current Retrobrew Computers systems and so the LC circuit components should not be required.
  
 The Adafruit FT232H breakout board can be permanently mounted using either 0.1" breakaway header strips soldered to both boards, or it can be made removable using SIL pin strips and sockets (eg Harwin D01-9922046 and D01-9973246) which allows it to be re-used for other projects. The Adafruit FT232H breakout board can be permanently mounted using either 0.1" breakaway header strips soldered to both boards, or it can be made removable using SIL pin strips and sockets (eg Harwin D01-9922046 and D01-9973246) which allows it to be re-used for other projects.
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 **For Windows** you need to use the [[http://​www.ftdichip.com/​Support/​Utilities.htm#​FT_PROG|FT_PROG]] utility which can be freely downloaded from the FTDI web site. I've made a {{:​boards:​ecb:​usb-fifo:​ft232h-template.zip|template}} ​ that you can load into the FT_PROG program. The program is a bit counter-intuitive so here are some brief instructions:​ Connect the USB device, run FT_PROG, load the provided XML template. Tell FT_PROG to scan for devices, then right-click on the FT232H USB device (not the template) and tell it to apply the loaded template. This sets the desired configuration for the device. Click the "​Program Devices"​ button in the toolbar, then click the "​Program"​ button. This writes the configuration to the EEPROM. **For Windows** you need to use the [[http://​www.ftdichip.com/​Support/​Utilities.htm#​FT_PROG|FT_PROG]] utility which can be freely downloaded from the FTDI web site. I've made a {{:​boards:​ecb:​usb-fifo:​ft232h-template.zip|template}} ​ that you can load into the FT_PROG program. The program is a bit counter-intuitive so here are some brief instructions:​ Connect the USB device, run FT_PROG, load the provided XML template. Tell FT_PROG to scan for devices, then right-click on the FT232H USB device (not the template) and tell it to apply the loaded template. This sets the desired configuration for the device. Click the "​Program Devices"​ button in the toolbar, then click the "​Program"​ button. This writes the configuration to the EEPROM.
  
-**For Linux** I have written a {{:​boards:​ecb:​usb-fifo:​ft232h-program-eeprom.tar.gz|short C program }}  which uses libftdi1 to program the EEPROM. The tarball contains both the source code and a binary with libftdi1 statically linked in. Ensure the FT232H board is the only connected FTDI device (just in case it tries to overwrite the EEPROM in other devices!) and then run "sudo ./​program-eeprom -w" to program the device. Running "sudo ./​program-eeprom"​ (without the "​-w"​ option) will report the current EEPROM contents.+**For Linux** I have written a {{:​boards:​ecb:​usb-fifo:​ft232h-program-eeprom.tar.gz|short C program }}  which uses libftdi1 to program the EEPROM. The tarball contains both the source code and a binary with libftdi1 ​and libusb ​statically linked in, this should work on most recent Linux systems which use (the dreaded) systemd. Ensure the FT232H board is the only connected FTDI device (just in case it tries to overwrite the EEPROM in other devices!) and then run "sudo ./​program-eeprom -w" to program the device. Running "sudo ./​program-eeprom"​ (without the "​-w"​ option) will report the current EEPROM contents.
  
-**For MacOS** I had success running FT_PROG in a virtual Windows machine (using Parallels Desktop) using the USB passthrough feature.+**For MacOS** I had success running FT_PROG in a virtual Windows machine (using Parallels Desktop) using the USB passthrough feature. In principle it should also be possible to compile libusb, libftdi1 and use my C program to program the EEPROM but I have not tested this. 
 + 
 +It is possible to build this board with entirely 74LS series logic, and this works well. However slightly higher performance can be achieved by substituting 74AHCT parts for U6 and U9, and 74ACT for U7 and U11. Testing on a Mark IV SBC at 36.864MHz, a board using only 74LS parts requires 2 I/O wait states, whereas with the 74AHCT parts at U6 and U9 the board operates correctly with only 1 I/O wait state. U7 and U11 can use 74ACT32 which also gives a further timing improvement. The [[https://​www.retrobrewcomputers.org/​forum/​index.php?​t=msg&​th=142&​goto=2061&#​msg_2061|forum thread]] has more information on how the timing improves with CMOS parts. Note that U1, U2 and U3 should always use 74LS as the bus interface benefits from having hysteresis on the inputs to improve noise rejection; the 74LS244 and 74LS245 parts have Schmitt trigger inputs.
  
-It is recommended to use 74LS series parts on this board, at the time of writing it has not been tested with substitutions from other 74 series logic families. In particular U1, U2 and U3 benefit from having hysteresis (Schmitt triggers) on the inputs, which the 74LS244 and 74LS245 parts have. 
  
 ===== Photographs ===== ===== Photographs =====
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 </​code>​ </​code>​
  
-Untested idea: For writes up to 512 bytes in length, ​believe you could signal ​Send Immediate, then poll for the RX_EMPTY bitand then proceed to load up to 512 bytes into the transmit FIFO without checking the RX_EMPTY bit again (using the OTIR instruction,​ or an unrolled loop of OUTIs). I believe the 1KB FIFO in the FT232H is divided into two 512-byte buffers and one is loaded with data while the other is transferred over USB, so once any space in the buffer becomes available ​you can be confident there is at least 512 bytes of space available. Again, this is untested, but could allow for very fast transmission. +also have file transfer application ​for CP/MFIFOPIPE. Drop me an email (will /at/ sowerbutts.comif you'd like to try it out.
- +
-\\+
  
  
boards/ecb/usb-fifo/start.1489998407.txt.gz · Last modified: 2017/03/20 04:26 by will
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