The ECB-USB-FIFO board provides a high-speed interface for an EuroCard Bus machine to talk to a modern PC over USB. The board is based around the widely supported FTDI FT232H chip operating in “245-style asynchronous FIFO” mode. To avoid the need to solder surface-mount parts the Adafruit FT232H Breakout board is used.

On a KISS-68030 using an optimised transfer routine speeds in excess of 1MByte/sec (8Mbit/sec) can be achieved.

On the PC the interface is presented as a standard USB serial interface (a “Virtual COM port” on Windows, /dev/ttyUSB* on Linux) and can be used by any application normally used with standard serial ports. Note that although it presents as a serial port, the baud rate and other serial settings configured on the Virtual COM Port are ignored, it just provides an 8-bit clean path at whatever rate you can pump data in or out of it.

The FT232H has a separate FIFO (first-in-first-out queue) for the receive and transmit directions. Each FIFO is 1KB in size. Data is transferred to/from the FIFOs over the USB link in blocks of up to 512 bytes. A “send immediate” operation is supported which causes any queued data in the transmit FIFO to be sent over the USB link at the earliest opportunity, otherwise the FT232H may wait a short while to accumulate more data before performing a transfer over the USB link.

The board supports generating interrupts on either (or both) of two conditions: data waiting in receive FIFO, or space available in transmit FIFO. The interrupt can be routed to ECB lines NMI, INT, IR0–IR7. Enabling and masking of interrupts is under software control.

In addition to the 8-bit data path through the FIFO, there are two GPIO data lines (one input and one output) connected from the FT232H to the Status Register. These are not currently used but they were “free” to add to the design. To make use of them I believe you would need to use the FTDI MPSSE commands.

The ECB-USB-FIFO board decodes four adjacent I/O registers. The user can choose the top 6 bits (A2–A7) of the I/O address so it can be located anywhere in the I/O address space. The recommended base address is 0x0C (so the card occupies addresses 0x0C–0x0F).

The register use is as follows:

The Status Register bits have the following meanings:

Interrupts: Interrupt requests are controlled in two stages. The first stage is controlled by the INT_TX and INT_RX bits in the Status Register. Setting these bits to 1 causes an interrupt to be requested when the transmit FIFO has space available (INT_TX), or the receive FIFO contains data (INT_RX). The IRQ bit in the Status Register will be 1 only when either of these bits is set and the corresponding condition arises. The second stage is the INT_ENABLE bit: When the INT_ENABLE bit in the Status Register is set, and the IRQ bit is 1, the bus interrupt line selected with jumper J3 will be asserted to interrupt the CPU.

For example, software which wants to receive an interrupt when data arrives in the receive FIFO over USB should set both INT_RX and INT_ENABLE. If the interrupt line is shared with multiple devices the interrupt service routine can then check the IRQ bit to determine if the USB-FIFO card is requesting the interrupt before calling the USB-FIFO interrupt handler code.

When the USB cable is disconnected, TX_FULL and RX_EMPTY will both be set, indicating that data cannot be transferred in either direction.

When the ECB machine is reset, the INT_ENABLE, INT_TX, INT_RX and GPIO_IN bits are all reset to 0. The USB connection is not reset (ie the virtual serial device will remain connected).

J1: Reset input selector. Jumper 1-2 for legacy (DIN pin C31), or jumper 2-3 for Kontron (DIN pin C26). Kontron style (2-3) is recommended.

J2: I/O address selection. The top 6 bits of the I/O address can be set here. Presence of a jumper indicates a 0 bit, absence of a jumper indicates a 1 bit. Recommended configuration is to fit jumpers on A4, A5, A6, A7 to select I/O addresses 000011xx, ie 0x0C–0x0F.

J3: Interrupt line selection. Install at most one jumper to select the bus line to which the interrupt request signal will be routed. Recommended configuration is “IRQ” on Z80/Z180 machines, and “IR1” on 68K machines. If interrupts are not required the jumper may be omitted.

PDF Schematic

Important note on R3, C12: Footprints are provided for these components but they should not normally be required. No component should be fitted at C12. A wire jumper should be fitted at R3.

The FT232H /WRITE signal is active on the falling edge of the signal, instead of the standard rising edge. To ensure the data lines are steady for long enough to meet its setup time requirements, the write signal is delayed by routing it through a few gates in U3 and U7. R3 and C12 can form an RC circuit used to extend this delay if required. Alternatively the delay can be shortened by omitting the wire jumper at R3 and connecting U3 pin 17 to U3 pins 5, 7 or 13. Testing indicates that the standard delay should suit all current Retrobrew Computers systems and so the RC circuit components should not be required.

The Adafruit FT232H breakout board can be permanently mounted using either 0.1” breakaway header strips soldered to both boards, or it can be made removable using SIL pin strips and sockets (eg Harwin D01-9922046 and D01-9973246) which allows it to be re-used for other projects.

The FT232H breakout board contains a serial EEPROM which must be programmed to configure the FT232H to use the correct operating mode (“245 Asynchronous FIFO”). This can be done over USB from a PC. The EEPROM needs to be programmed one time only.

For Windows you need to use the FT_PROG utility which can be freely downloaded from the FTDI web site. I've made a template that you can load into the FT_PROG program. The program is a bit counter-intuitive so here are some brief instructions: Connect the USB device, run FT_PROG, load the provided XML template. Tell FT_PROG to scan for devices, then right-click on the FT232H USB device (not the template) and tell it to apply the loaded template. This sets the desired configuration for the device. Click the “Program Devices” button in the toolbar, then click the “Program” button. This writes the configuration to the EEPROM.

For Linux I have written a short C program which uses libftdi1 to program the EEPROM. The tarball contains both the source code and a binary with libftdi1 and libusb statically linked in, this should work on most recent Linux systems. Ensure the FT232H board is the only connected FTDI device (just in case it tries to overwrite the EEPROM in other devices!) and then run “sudo ./program-eeprom -w” to program the device. Running “sudo ./program-eeprom” (without the “-w” option) will report the current EEPROM contents.

For MacOS I had success running FT_PROG in a virtual Windows machine (using Parallels Desktop) using the USB passthrough feature. In principle it should also be possible to compile libusb, libftdi1 and use my C program to program the EEPROM but I have not tested this.

It is possible to build this board with entirely 74LS series logic, and this works well. However slightly higher performance can be achieved by substituting 74AHCT parts for U6 and U9, and 74ACT for U7 and U11. Testing on a Mark IV SBC at 36.864MHz, a board using only 74LS parts requires 2 I/O wait states, whereas with the 74AHCT parts at U6 and U9 the board operates correctly with only 1 I/O wait state. U7 and U11 can use 74ACT32 which also gives a further timing improvement. The forum thread has more information on how the timing improves with CMOS parts. Note that U1, U2 and U3 should always use 74LS as the bus interface benefits from having hysteresis on the inputs to improve noise rejection; the 74LS244 and 74LS245 parts have Schmitt trigger inputs.

FT232H boards produced after Feb 2020 (using a USB-C connector instead of Micro-USB) have two additional pins for 3V and GND at the end of the board closest to the USB connector. These should be left disconnected.

Note that this code has been optimised on a Z180. On Z80 it may be faster to replace the JR instructions with JP (untested).

FIFO_BASE       = 0x0C
FIFO_DATA       = (FIFO_BASE+0)
FIFO_STATUS     = (FIFO_BASE+1)
FIFO_SEND_IMM   = (FIFO_BASE+2)

; Receive a block of length DE bytes from the FIFO to memory starting at address HL
fifo_receive:
        ; Enter with:
        ;   HL = pointer to data buffer
        ;   DE = number of bytes to transmit
        ld b, e                 ; setup loop counter
        dec de
        inc d
        ld c, #FIFO_DATA        ; load port address
waitrx:
        in a, (FIFO_STATUS)
        rla                     ; RX_EMPTY bit into carry flag
        jr c, waitrx            ; loop until data ready
        ini                     ; read from port C, write to HL, HL++, B--
        jr nz, waitrx           ; INI sets Z flag to indicate new value of B
        dec d
        jr nz, waitrx
        ret

; Transmit a block of length DE bytes to the FIFO from memory starting at address HL
fifo_transmit:
        ; Enter with:
        ;   HL = pointer to data buffer
        ;   DE = number of bytes to transmit
        ld b, e                 ; setup loop counter
        dec de
        inc d
        ld c, #FIFO_DATA        ; load port address
waittx:
        in a, (FIFO_STATUS)
        rra                     ; TX_FULL bit into carry flag
        jr c, waittx            ; loop while tx fifo full
        outi                    ; read from HL, write to port C, HL++, B--
        jr nz, waittx           ; OUTI sets Z flag to indicate new value of B
        dec d
        jr nz, waittx
        ret

; Request transfer of transmitted data ASAP (without this it is delayed up to 17ms)
fifo_flush:
        out (FIFO_SEND_IMM), a  ; we can write any value to the register
        ret

I also have a file transfer application for CP/M, FIFOPIPE. Drop me an email (will /at/ sowerbutts.com) if you'd like to try it out.

RomWBW included driver support for the ecb-usb-fifo board. The driver does not support interrupts. It has been confirmed working on the SBC-V2 and the MKIV. Performance is poor compared to normal serial communication but is dependent on processor speed. The driver can be enabled with the following assembly customization:

UFENABLE  .SET  TRUE

Inclusion of the driver in RomWBW will result in the board appearing as SIO serial port. The port is virtual in nature and changing serial settings have no affect on it's operation.

RetroBrew HBIOS v2.9.2-pre.3, 2019-08-07

SBC Z80 @ 3.992MHz
0 MEM W/S, 1 I/O W/S, INT MODE 2
512KB ROM, 512KB RAM

UART0: IO=0x68 16550A MODE=38400,8,N,1
DSRTC: MODE=STD Thu 2019-08-08 17:42:23 CHARGE=ON
MD: UNITS=2 ROMDISK=384KB RAMDISK=384KB
USB-FIFO: IO=0x0C

Unit        Device      Type              Capacity/Mode
----------  ----------  ----------------  --------------------
Disk 0      MD1:        RAM Disk          384KB,LBA
Disk 1      MD0:        ROM Disk          384KB,LBA
Char 0      UART0:      RS-232            38400,8,N,1
Char 1      SIO0:       RS-232            9600,8,N,1

Depending on how many character based ports are in your system, you may be able to use CP/M redirection to access the USB-Fifo port. In order for the the USB-fifo board to be used as the console device it must be set as the first RomWBW CIO device through the FORCECON option.

FORCECON .SET 2

Serial File transfer using the USB-Fifo can be accomplished using Willl Sowerbutts fifo-pipe program or using XModem.

The Windows FTDI drivers allows the capability of the FT232H device to be configured through the device manager.

Recommended changes from the default setting are:

• Serial Enumerator - unchecked
• Disable Modem Ctrl At Startup - checked

Detailed driver setting information can be seen in this application note.