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boards:ecb:ramfloppy:start [2019/09/23 21:54]
b1ackmai1er [Version]
boards:ecb:ramfloppy:start [2020/02/08 03:33] (current)
b1ackmai1er [Software Support]
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 ====== Short description of the ECB-RAMF R11 function ====== ====== Short description of the ECB-RAMF R11 function ======
  
-The description of the module is used in this document refer to the hardware revision R1.1 Releasedate 15<​sup>​th</​sup> ​  ​July 2013. The hardware has been changed to a greater extent and is not compatible with previous version R0.6 (R0.7 as R0.6 with corrections). This is an typical process of Microcomputerdevelopment.+The description of the module is used in this document refer to the hardware revision R1.1 Releasedate 15<​sup>​th</​sup> ​ July 2013. The hardware has been changed to a greater extent and is not compatible with previous version R0.6 (R0.7 as R0.6 with corrections). This is an typical process of Microcomputerdevelopment.
  
 The actual storage media in the RAM Floppy is a collection of eight static RAMs (providing a storage capacity of 4MBytes per board). The actual storage media in the RAM Floppy is a collection of eight static RAMs (providing a storage capacity of 4MBytes per board).
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 The maximum size of a disk device under CP/M-80 v2.2 is 8MByte. In later versions this limit is much higher. The maximum size of a disk device under CP/M-80 v2.2 is 8MByte. In later versions this limit is much higher.
  
-Our RAM Floppy is idea in that a normal CP/M drive can be implemented using two RAM Floppies providing the total of eight megabytes. One board can provide a smaller but still usable amount of additional fast storage.+Our RAM Floppy is idea in that a normal CP/M drive can be implemented using two RAM Floppies providing the total of eight megabytes. One board can provide a smaller but still usable amount of additional fast storage. Current software only supports each ramdrive board a single CP/M drive.
  
 An addressing logic, which simulates the structure of a hard disk, controls the access to the memory. On the ECB bus are usable: An addressing logic, which simulates the structure of a hard disk, controls the access to the memory. On the ECB bus are usable:
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 LED1C (green) activity indicator read-write access to data ECB-RAMF LED1C (green) activity indicator read-write access to data ECB-RAMF
 +
  
 ====== Technical Data ====== ====== Technical Data ======
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 ====== Description of the block diagram ====== ====== Description of the block diagram ======
  
-The maximum storage capacity of the ECB board ECB-RAMF 11 is 4 MB, but each of the 8 SRAM IC 512kByte must be equipped on the PCB. Addressing the 4 MB is calculated in the BIOS of the CPM80 from the given data by sector and track. The logic sector size of CP/M 2.2 is 128Byte, the physical sector size of ECB-RAMF 11 is 512 Byte. These data are converted in exactly the information that is pre-loaded into the address counter as the starting address. The counter done thereby completely the byte addressing within a sector, the sector address and the track addressing. The following chart shows how the address in the address space of 4 Mbytes of SRAM composed resulting from the calculated data passed by the BIOS. This figure applies to the assignment of 128Byte/Sektor.+The maximum storage capacity of the ECB board ECB-RAMF 11 is 4 MB, but each of the 8 SRAM IC 512kByte must be equipped on the PCB. Addressing the 4 MB is calculated in the BIOS of the CPM80 from the given data by sector and track. The logic sector size of CP/M 2.2 is 128Byte, the physical sector size of ECB-RAMF 11 is 512 Byte. These data are converted in exactly the information that is pre-loaded into the address counter as the starting address. The counter done thereby completely the byte addressing within a sector, the sector address and the track addressing. The following chart shows how the address in the address space of 4 Mbytes of SRAM composed resulting from the calculated data passed by the BIOS. This figure applies to the assignment of 128Byte/Sector.
  
 | \\  {{:​boards:​ecb:​ramfloppy:​fig_42.jpg?​nolink&​453x222|fig_42.jpg}}| | \\  {{:​boards:​ecb:​ramfloppy:​fig_42.jpg?​nolink&​453x222|fig_42.jpg}}|
  
-<font 9px/​inherit;;​inherit;;​inherit>​adress-calculation of ECB-RAMF R11</​font>​+<font 9px/​inherit;;​inherit;;​inherit>​address-calculation of ECB-RAMF R11</​font>​
  
 Byte-Counter Byte Address (0…511 in IC12) Byte-Counter Byte Address (0…511 in IC12)
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 SecTrk-high Sector Track Address high (IC11) SecTrk-high Sector Track Address high (IC11)
 +
 +\\
 +
  
 ====== Electronic of ECB-RAMF ====== ====== Electronic of ECB-RAMF ======
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 ==== Battery-Backup-Mode ==== ==== Battery-Backup-Mode ====
  
-A special task has IC15. I the case of “power down” the voltage V<​sub>​CC</​sub> ​ is switched off and VCMOS is now generated via D2 from B_VCMOS. The moment of switching is critical for CMOS-RAMS. The can lost information and there could be start unsolved write-cycles to the memory chips. In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down control-support for static RAM. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. The memory circuit is automatically disabled during a power loss because in this the signal /RESET is going LOW. (In this application the TLC77xx power has to be supplied by the battery.) The TI-solution to solve this problem is shown in picture 4.6. Please be careful, in picture 4.6 is an CPU (TMS70C20). In the ECB-RAMF this IC is the RAM-Access-Decoder IC14A and the Input G1. G1 of IC14A must be “HIGH” to to give access to the RAM-IC. If the signal /IC15-R on G1 is going to LOW, the access to RAM-IC is denied. D1 and D2 must be 1A shottky diodes (1N5817).+A special task has IC15. I the case of “power down” the voltage V<​sub>​CC</​sub>​ is switched off and VCMOS is now generated via D2 from B_VCMOS. The moment of switching is critical for CMOS-RAMS. The can lost information and there could be start unsolved write-cycles to the memory chips. In addition to the power-on-reset and under voltage-supervisor function, the TLC77xx adds power-down control-support for static RAM. The voltage monitor contains additional logic intended for control of static memories with battery backup during power failure. The memory circuit is automatically disabled during a power loss because in this the signal /RESET is going LOW. (In this application the TLC77xx power has to be supplied by the battery.) The TI-solution to solve this problem is shown in picture 4.6. Please be careful, in picture 4.6 is an CPU (TMS70C20). In the ECB-RAMF this IC is the RAM-Access-Decoder IC14A and the Input G1. G1 of IC14A must be “HIGH” to to give access to the RAM-IC. If the signal /IC15-R on G1 is going to LOW, the access to RAM-IC is denied. D1 and D2 must be 1A shottky diodes (1N5817).
  
 Solution from Texas Instruments:​ Data Retention Power Down using Static CMOS RAMs: Solution from Texas Instruments:​ Data Retention Power Down using Static CMOS RAMs:
  
 **{{:​boards:​ecb:​ramfloppy:​fig_47.jpg?​nolink&​522x230|fig_47.jpg}}** **{{:​boards:​ecb:​ramfloppy:​fig_47.jpg?​nolink&​522x230|fig_47.jpg}}**
 +
 +Although the RAM Floppy required battery backup to retain it's memory contents it has been observed that the static memories can retain their contents for very short periods of time. So some maintenance tasks can be completed that require powering down if the work is completed very quickly i.e. in less than 10 seconds.
 +
 +Note that supercapacitors connected to the bus as part of main cpu board will drain very quickly.
 +
  
 ==== Status displays of the ECB-RAMF ==== ==== Status displays of the ECB-RAMF ====
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 |23|IC15|DIP-8-300|1|TLC7705D| |23|IC15|DIP-8-300|1|TLC7705D|
 |24|IC14|DIP-16-300|1|74HCT138 (must be 74HCT)| |24|IC14|DIP-16-300|1|74HCT138 (must be 74HCT)|
-|25|IC23|DIP-8-300|1|ATTINY13-20PU|+|25|IC23|DIP-8-300|1|ATTINY13-20PU ​or ATTINY13A|
 |26|JP1|SIL-3|1|JUMPER3| |26|JP1|SIL-3|1|JUMPER3|
 |27| |Socket DIP32 8pc|8|Precision type| |27| |Socket DIP32 8pc|8|Precision type|
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 Down the text the assembly and the switch position of the ECB Standard-I/​O-address ECB-RAMF R11 is shown. Basically, the I/O-address range will be adjusted to your taste. Keep in mind that this is reflected in the test program and drivers. Down the text the assembly and the switch position of the ECB Standard-I/​O-address ECB-RAMF R11 is shown. Basically, the I/O-address range will be adjusted to your taste. Keep in mind that this is reflected in the test program and drivers.
  
-A closed switch means a 0-bit in the address specification. ​Here are some simple examples with board-start-address 0A0H #1 and 0A4H #2. +A closed switch means a 0-bit in the address specification.
- +
-Attention:​ +
- +
-This definition is only for example. The real combination depends on system. +
- +
-For a 4Mbyte singe-PCB system You need the addresses as follows: +
- +
-<​code>​ +
-RAMF_BAS EQU 0A0H       ; Base address of RAMF +
-RAMF_DAT EQU RAMF_BAS ​  ; Data In/Out only to SRAM R/W +
-RAMF_AL ​ EQU RAMF_BAS 1 ; Address low for RAMF Memory Cell W +
-RAMF_AH ​ EQU RAMF_BAS 2 ; Address high for RAMF Memory Cell W +
-RAMF_ST ​ EQU RAMF_BAS 3 ; Status port R/O +
-</​code>​ +
- +
-For a 2 * 4MByte double-PCB system You need the addresses as follows: +
- +
-<​code>​ +
-RAMF_BAS1 EQU 0A0H        ; Base address of RAMF#1 +
-RAMF_DAT1 EQU RAMF_BAS1 ​  ; Data In/Out only to SRAM R/W +
-RAMF_AL1 ​ EQU RAMF_BAS1 1 ; Address low for RAMF Memory Cell W +
-RAMF_AH1 ​ EQU RAMF_BAS1 2 ; Address high for RAMF Memory Cell W +
-RAMF_ST1 ​ EQU RAMF_BAS1 3 ; Status port R/O +
- +
-RAMF_BAS2 EQU 0A4H        ; Base address of RAMF#2 +
-RAMF_DAT2 EQU RAMF_BAS2 ​  ; Data In/Out only to SRAM R/W +
-RAMF_AL2 ​ EQU RAMF_BAS2 1 ; Address low for RAMF Memory Cell W +
-RAMF_AH2 ​ EQU RAMF_BAS2 2 ; Address high for RAMF Memory Cell W +
-RAMF_ST2 ​ EQU RAMF_BAS2 3 ; Status port R/O +
-</​code>​ +
- +
-**Attention!** +
- +
-**Attention!** +
- +
-<font inherit/​inherit;;#​FF0000;;​inherit>​**Since RomWBW 2.5.2. we find as first step 2 RAM-Floppies with an size of 4MB on each PCB. **</​font>​+
  
 Address assignment of ECB-RAMF-R11 Address assignment of ECB-RAMF-R11
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 |<font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1-0-1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​Read Status</​font>​| |<font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​X</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1-0-1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​1</​font>​|<​font 10px/​inherit;;​inherit;;​inherit>​Read Status</​font>​|
  
-Write to Address Low or Address resets the Counter IC12A.+Write to Address Low or Address ​High resets the Counter IC12A.
  
 \\ \\
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 |0|0|1|0|0|1|90H|Preferred for EF9366 VDU board| |0|0|1|0|0|1|90H|Preferred for EF9366 VDU board|
 |1|0|1|0|0|0|A0H|Preferred for ECB-RAMF R11 #1| |1|0|1|0|0|0|A0H|Preferred for ECB-RAMF R11 #1|
-|1|0|1|1|0|1|A4H|Preferred for ECB-RAMF R11 #2|+|1|0|1|0|0|1|A4H|Preferred for ECB-RAMF R11 #2|
 |1|1|0|0|0|0|C0H|Preferred for ECB-ModPrn R0.2 #1 / #2| |1|1|0|0|0|0|C0H|Preferred for ECB-ModPrn R0.2 #1 / #2|
 |1|1|0|1|0|0|D0H|Preferred for ECB-PIO or EF9366 VDU| |1|1|0|1|0|0|D0H|Preferred for ECB-PIO or EF9366 VDU|
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 ====== Software Support ====== ====== Software Support ======
  
-ECB-RAMF support is not enabled by default in the ROMWBW ​for the SBC V2. A new build of ROMWBW will be required with changes to the following settings:+ECB-RAMF support is not enabled by default in the ROMWBW. A new build of ROMWBW will be required with changes to the following settings ​in your custom configuration file:
  
-cfg_sbc.asm+SBC_std_cust.asm
  
 <​code>​ <​code>​
-RFENABLE ​   .EQU    ​TRUE ​        ; TRUE FOR RAM FLOPPY SUPPORT +RFENABLE ​   .SET    ​TRUE ​        ; TRUE FOR RAM FLOPPY SUPPORT 
-RFCNT       .EQU    ​1 ​           ; NUMBER OF RAM FLOPPY UNITS (MAX IS 2)+RFCNT       .SET    ​1 ​           ; NUMBER OF RAM FLOPPY UNITS (MAX IS 4)
 </​code>​ </​code>​
  
-The default address is configured for board one at A0h and A4h for the second boards. If required these addresses can be reconfigured:​+The default address is configured for boards ​at A0hA4h, A8h, ACh. If required these addresses can be reconfigured:​
  
 rf.asm rf.asm
  
 <​code>​ <​code>​
-RF_U0IO ​       .EQU    $A0 +RF_U0IO ​       .EQU    $A0      ; BASE ADDRESS OF RAMFLOPPY 1 
-RF_U1IO ​       .EQU    $A4+RF_U1IO ​       .EQU    $A4      ; BASE ADDRESS OF RAMFLOPPY 2 
 +RF_U2IO ​       .EQU    $A8      ; BASE ADDRESS OF RAMFLOPPY 3 
 +RF_U3IO ​       .EQU    $AC      ; BASE ADDRESS OF RAMFLOPPY 4
 </​code>​ </​code>​
  
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 Directory cleared. Directory cleared.
 **B>** **B>**
-</​code>​ Test software can be found here: {{:​boards:​ecb:​ramfloppy:​firmware:​raf113.zip|:​boards:​ecb:​ramfloppy:​firmware:​raf113.zip}}+</​code>​ 
 + 
 +Test software can be found here: {{:​boards:​ecb:​ramfloppy:​firmware:​raf113.zip|:​boards:​ecb:​ramfloppy:​firmware:​raf113.zip}} 
 + 
 +Copy speed of data from a RAM Floppy to another RAM Floppy using PIP on a 10Mhz SBC V2 was measured as 21kbs.
  
  
boards/ecb/ramfloppy/start.1569290040.txt.gz · Last modified: 2019/09/23 21:54 by b1ackmai1er
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