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boards:ecb:ramfloppy:start [2018/09/08 02:35] b1ackmai1er [Parts List] |
boards:ecb:ramfloppy:start [2021/07/04 09:55] (current) b1ackmai1er |
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ECB RAM Floppy was developed by Dr. Wolfgang Kabatzke. The original documentation for this project is on the [[https:// | ECB RAM Floppy was developed by Dr. Wolfgang Kabatzke. The original documentation for this project is on the [[https:// | ||
+ | The ECB RAM Floppy appears to be based on Gerald Ebert' | ||
===== Version ===== | ===== Version ===== | ||
Line 23: | Line 24: | ||
Revision 12 is described [[: | Revision 12 is described [[: | ||
- | |||
- | Revision 13 is under development as of early 2016 with the main feature being PAL replacement of LS-TTL-Logic. | ||
Some of the documentation and images below show inconsistencies in version numbers or development versions. | Some of the documentation and images below show inconsistencies in version numbers or development versions. | ||
+ | ===== Errata ===== | ||
+ | |||
+ | Changes identified from the Revision 12 board that could be incorporated in your R11 build | ||
+ | |||
+ | RN2 changed from 4K7 to 10K | ||
+ | |||
+ | R4, R5 changed from 4K7 to 10K | ||
===== Pictures ===== | ===== Pictures ===== | ||
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[[: | [[: | ||
- | |||
===== Board ===== | ===== Board ===== | ||
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[[https:// | [[https:// | ||
- | |||
====== Preamble by Wolfgang Kabatzke. ====== | ====== Preamble by Wolfgang Kabatzke. ====== | ||
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The maximum size of a disk device under CP/M-80 v2.2 is 8MByte. In later versions this limit is much higher. | The maximum size of a disk device under CP/M-80 v2.2 is 8MByte. In later versions this limit is much higher. | ||
- | Our RAM Floppy is idea in that a normal CP/M drive can be implemented using two RAM Floppies providing the total of eight megabytes. One board can provide a smaller but still usable amount of additional fast storage. | + | Our RAM Floppy is idea in that a normal CP/M drive can be implemented using two RAM Floppies providing the total of eight megabytes. One board can provide a smaller but still usable amount of additional fast storage. Current software only supports each ramdrive board a single CP/M drive. |
An addressing logic, which simulates the structure of a hard disk, controls the access to the memory. On the ECB bus are usable: | An addressing logic, which simulates the structure of a hard disk, controls the access to the memory. On the ECB bus are usable: | ||
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====== Description of the block diagram ====== | ====== Description of the block diagram ====== | ||
- | The maximum storage capacity of the ECB board ECB-RAMF 11 is 4 MB, but each of the 8 SRAM IC 512kByte must be equipped on the PCB. Addressing the 4 MB is calculated in the BIOS of the CPM80 from the given data by sector and track. The logic sector size of CP/M 2.2 is 128Byte, the physical sector size of ECB-RAMF 11 is 512 Byte. These data are converted in exactly the information that is pre-loaded into the address counter as the starting address. The counter done thereby completely the byte addressing within a sector, the sector address and the track addressing. The following chart shows how the address in the address space of 4 Mbytes of SRAM composed resulting from the calculated data passed by the BIOS. This figure applies to the assignment of 128Byte/Sektor. | + | The maximum storage capacity of the ECB board ECB-RAMF 11 is 4 MB, but each of the 8 SRAM IC 512kByte must be equipped on the PCB. Addressing the 4 MB is calculated in the BIOS of the CPM80 from the given data by sector and track. The logic sector size of CP/M 2.2 is 128Byte, the physical sector size of ECB-RAMF 11 is 512 Byte. These data are converted in exactly the information that is pre-loaded into the address counter as the starting address. The counter done thereby completely the byte addressing within a sector, the sector address and the track addressing. The following chart shows how the address in the address space of 4 Mbytes of SRAM composed resulting from the calculated data passed by the BIOS. This figure applies to the assignment of 128Byte/Sector. |
| \\ {{: | | \\ {{: | ||
- | <font 9px/ | + | <font 9px/ |
Byte-Counter Byte Address (0…511 in IC12) | Byte-Counter Byte Address (0…511 in IC12) | ||
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==== Battery-Backup-Mode ==== | ==== Battery-Backup-Mode ==== | ||
- | A special task has IC15. I the case of “power down” the voltage V< | + | A special task has IC15. I the case of “power down” the voltage V< |
Solution from Texas Instruments: | Solution from Texas Instruments: | ||
**{{: | **{{: | ||
+ | |||
+ | Although the RAM Floppy required battery backup to retain it's memory contents it has been observed that the static memories can retain their contents for very short periods of time. So some maintenance tasks can be completed that require powering down if the work is completed very quickly i.e. in less than 10 seconds. | ||
+ | |||
+ | Note that supercapacitors connected to the bus as part of main cpu board will drain very quickly. | ||
==== Status displays of the ECB-RAMF ==== | ==== Status displays of the ECB-RAMF ==== | ||
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A special feature of the IC22 Represents This driver consists of two halves, each with 4 bits. This 4-bit with Schmitt-trigger input to decouple the control signal /RD, /WR, /IORQ and /M1 from the bus can be used (IC22A). The other 4 bits (IC22B) are used to signal status of the ECB-RAMF to switch to the bus. These are programmatic evaluation. \\ | A special feature of the IC22 Represents This driver consists of two halves, each with 4 bits. This 4-bit with Schmitt-trigger input to decouple the control signal /RD, /WR, /IORQ and /M1 from the bus can be used (IC22A). The other 4 bits (IC22B) are used to signal status of the ECB-RAMF to switch to the bus. These are programmatic evaluation. \\ | ||
The IC17A (74LS688) serves in conjunction with S1 and RN1 as I/O address decoder of the assembly. The 8 /CS signals for the SRAM-IC are formed from the ECB-RAMF-activation (IC17), the /CS decoder (IC15) and the CMOS buffer battery voltage monitoring (D1, D2 and IC15). The address latches (IC10A and IC11A) -are addressed and loaded by the ECB-RAMF-activation (IC17A) and the I/O-address decoder (IC13A). | The IC17A (74LS688) serves in conjunction with S1 and RN1 as I/O address decoder of the assembly. The 8 /CS signals for the SRAM-IC are formed from the ECB-RAMF-activation (IC17), the /CS decoder (IC15) and the CMOS buffer battery voltage monitoring (D1, D2 and IC15). The address latches (IC10A and IC11A) -are addressed and loaded by the ECB-RAMF-activation (IC17A) and the I/O-address decoder (IC13A). | ||
- | |||
====== Assembly instructions ====== | ====== Assembly instructions ====== | ||
{{https:// | {{https:// | ||
- | |||
====== Parts List ====== | ====== Parts List ====== | ||
Line 263: | Line 269: | ||
|23|IC15|DIP-8-300|1|TLC7705D| | |23|IC15|DIP-8-300|1|TLC7705D| | ||
|24|IC14|DIP-16-300|1|74HCT138 (must be 74HCT)| | |24|IC14|DIP-16-300|1|74HCT138 (must be 74HCT)| | ||
- | |25|IC23|DIP-8-300|1|ATTINY13-20PU| | + | |25|IC23|DIP-8-300|1|ATTINY13-20PU |
|26|JP1|SIL-3|1|JUMPER3| | |26|JP1|SIL-3|1|JUMPER3| | ||
|27| |Socket DIP32 8pc|8|Precision type| | |27| |Socket DIP32 8pc|8|Precision type| | ||
Line 270: | Line 276: | ||
|30| |Socket DIP14 8pc|3|Precision type| | |30| |Socket DIP14 8pc|3|Precision type| | ||
|31| |Socket DIP8 8pc|2|Precision type| | |31| |Socket DIP8 8pc|2|Precision type| | ||
- | |||
- | \\ | ||
- | |||
====== Dealing with IC ====== | ====== Dealing with IC ====== | ||
- | CMOS devices are highly sensitive to static electricity! Keep your transport or CMOS chips on only conductive foam! All pins must be shorted.\\ | + | CMOS devices are highly sensitive to static electricity! Keep your transport or CMOS chips on only conductive foam! All pins must be shorted. \\ |
Make sure that you connect to a grounding system before working with these modules. ESD is appropriate article in the trade. All IC with blocking capacitors are 100nF X7R-5 (0,1 uF Tantal is also ok, please be careful with polarization) provided. This is absolutely important. Otherwise there is an reduction of the functionality of the module due to EMC influence. | Make sure that you connect to a grounding system before working with these modules. ESD is appropriate article in the trade. All IC with blocking capacitors are 100nF X7R-5 (0,1 uF Tantal is also ok, please be careful with polarization) provided. This is absolutely important. Otherwise there is an reduction of the functionality of the module due to EMC influence. | ||
- | |||
====== Assignment of connectors, jumpers and switches ====== | ====== Assignment of connectors, jumpers and switches ====== | ||
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Down the text the assembly and the switch position of the ECB Standard-I/ | Down the text the assembly and the switch position of the ECB Standard-I/ | ||
- | A closed switch means a 0-bit in the address specification. | + | A closed switch means a 0-bit in the address specification. |
- | + | ||
- | Attention: | + | |
- | + | ||
- | This definition is only for example. The real combination depends on system. | + | |
- | + | ||
- | For a 4Mbyte singe-PCB system You need the addresses as follows: | + | |
- | + | ||
- | < | + | |
- | RAMF_BAS EQU 0A0H ; Base address of RAMF | + | |
- | RAMF_DAT EQU RAMF_BAS | + | |
- | RAMF_AL | + | |
- | RAMF_AH | + | |
- | RAMF_ST | + | |
- | </ | + | |
- | + | ||
- | For a 2 * 4MByte double-PCB system You need the addresses as follows: | + | |
- | + | ||
- | < | + | |
- | RAMF_BAS1 EQU 0A0H ; Base address of RAMF#1 | + | |
- | RAMF_DAT1 EQU RAMF_BAS1 | + | |
- | RAMF_AL1 | + | |
- | RAMF_AH1 | + | |
- | RAMF_ST1 | + | |
- | + | ||
- | RAMF_BAS2 EQU 0A4H ; Base address of RAMF#2 | + | |
- | RAMF_DAT2 EQU RAMF_BAS2 | + | |
- | RAMF_AL2 | + | |
- | RAMF_AH2 | + | |
- | RAMF_ST2 | + | |
- | </ | + | |
- | + | ||
- | **Attention!** | + | |
- | + | ||
- | **Attention!** | + | |
- | + | ||
- | <font inherit/ | + | |
Address assignment of ECB-RAMF-R11 | Address assignment of ECB-RAMF-R11 | ||
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|<font 10px/ | |<font 10px/ | ||
- | Write to Address Low or Address resets the Counter IC12A. | + | Write to Address Low or Address |
- | + | ||
- | \\ | + | |
====== Jumper S4: ====== | ====== Jumper S4: ====== | ||
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S4/6 open = AB7 = 1 | S4/6 open = AB7 = 1 | ||
- | |||
====== Base-address table ====== | ====== Base-address table ====== | ||
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|0|0|1|0|0|1|90H|Preferred for EF9366 VDU board| | |0|0|1|0|0|1|90H|Preferred for EF9366 VDU board| | ||
|1|0|1|0|0|0|A0H|Preferred for ECB-RAMF R11 #1| | |1|0|1|0|0|0|A0H|Preferred for ECB-RAMF R11 #1| | ||
- | |1|0|1|1|0|1|A4H|Preferred for ECB-RAMF R11 #2| | + | |1|0|1|0|0|1|A4H|Preferred for ECB-RAMF R11 #2| |
|1|1|0|0|0|0|C0H|Preferred for ECB-ModPrn R0.2 #1 / #2| | |1|1|0|0|0|0|C0H|Preferred for ECB-ModPrn R0.2 #1 / #2| | ||
|1|1|0|1|0|0|D0H|Preferred for ECB-PIO or EF9366 VDU| | |1|1|0|1|0|0|D0H|Preferred for ECB-PIO or EF9366 VDU| | ||
|1|1|1|0|0|0|E0H|Preferred for ECB Color VDU board| | |1|1|1|0|0|0|E0H|Preferred for ECB Color VDU board| | ||
|1|1|1|1|0|0|F0H|Free| | |1|1|1|1|0|0|F0H|Free| | ||
- | |||
- | \\ | ||
- | |||
====== Jumper S3: ====== | ====== Jumper S3: ====== | ||
- | S3/1 reset the counter with signal B_/PWCLR | + | S3/1 reset the counter with signal B_/ |
- | S3/2 reset the counter with signal B_/RESET | + | S3/2 reset the counter with signal B_/ |
S3/3 /Option_Bit = 0 | S3/3 /Option_Bit = 0 | ||
- | |||
====== Switch S2: ====== | ====== Switch S2: ====== | ||
- | If the switch S2 is closed (switch down), the write protection is active. This prevents over IC18C that the CMOS memory can be described with a write access.\\ | + | If the switch S2 is closed (switch down), the write protection is active. This prevents over IC18C that the CMOS memory can be described with a write access. \\ |
The switch S2 generates the signal " | The switch S2 generates the signal " | ||
- | |||
====== Status-Port: | ====== Status-Port: | ||
- | DB7 X\\ | + | DB7 X \\ |
- | DB6 X\\ | + | DB6 X \\ |
- | DB5 X\\ | + | DB5 X \\ |
- | DB4 X\\ | + | DB4 X \\ |
- | DB3 activity\\ | + | DB3 activity \\ |
- | DB2 B_VCMOS\\ | + | DB2 B_VCMOS \\ |
- | DB1 /OPTION BIT\\ | + | DB1 /OPTION BIT \\ |
DB0 /PROT | DB0 /PROT | ||
- | |||
====== Connector P1: ====== | ====== Connector P1: ====== | ||
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|<font 11pt/ | |<font 11pt/ | ||
|<font 11pt/ | |<font 11pt/ | ||
- | |||
- | \\ | ||
- | |||
====== The ATTINY13-20 ====== | ====== The ATTINY13-20 ====== | ||
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[[http:// | [[http:// | ||
- | |||
====== Software Support ====== | ====== Software Support ====== | ||
- | ECB-RAMF support is not enabled by default in the ROMWBW | + | ECB-RAMF support is not enabled by default in the ROMWBW. A new build of ROMWBW will be required with changes to the following settings |
- | cfg_sbc.asm | + | SBC_std_cust.asm |
< | < | ||
- | RFENABLE | + | RFENABLE |
- | RFCNT .EQU | + | RFCNT .SET |
</ | </ | ||
- | The default address is configured for board one at A0h and A4h for the second boards. If required these addresses can be reconfigured: | + | The default address is configured for boards |
rf.asm | rf.asm | ||
< | < | ||
- | RF_U0IO | + | RF_U0IO |
- | RF_U1IO | + | RF_U1IO |
+ | RF_U2IO | ||
+ | RF_U3IO | ||
</ | </ | ||
- | Test software can be found here: {{: | + | Before use the RAM floppy needs to be initialized with the CLRDIR.COM command. Ensure the Write Protect switch is turned off. |
+ | < | ||
+ | RetroBrew HBIOS v2.9.1-pre.6, | ||
+ | ... | ||
+ | RF: IO=0xA0 DEVICES=1 WP=OFF | ||
+ | ... | ||
+ | Unit Device | ||
+ | ---------- | ||
+ | ... | ||
+ | Disk 4 RF0: RAM Floppy | ||
+ | ... | ||
+ | Configuring Drives... | ||
+ | ... | ||
+ | E:=RAMF0:0 | ||
+ | ... | ||
+ | CP/M-80 v2.2, 54.0K TPA | ||
+ | B>CLRDIR E: | ||
+ | CLRDIR V-0.4 (06-Aug-2012) by Max Scane | ||
+ | Warning - this utility will overwite the directory sectors of Drive: E: | ||
+ | Type Y to proceed any key other key to exit. Y | ||
+ | Directory cleared. | ||
+ | **B>** | ||
+ | </ | ||
- | ====== Future Development ====== | + | Test software |
- | + | ||
- | In subsequent versions of ECB-RAMF R2.0, the following features are planned: | + | |
- | + | ||
- | * An increase in the amount of storage each board can provide, now 8MByte instead of 4MByte. | + | |
- | * Continued ability to use two boards | + | |
- | * 8Mbyte on each ECB-RAMF R2.0 with 2 PCB | + | |
- | * ECB as strictly recommended standard, no deviations, compliance to KONTRON ECB | + | |
- | * One PCB for bus logic/bus interface and control | + | |
- | * one Piggyback-PCB only for 8MByte SRAM (maybe SMT) | + | |
- | * the bus logic/bus interface etc. is the same like in R1.1, only 1 internal SRAM-address-line more | + | |
- | + | ||
- | After this the development is stopping … otherwise there is in the group interest to realize ECB-RAMF 3.0 with DMA-Access. Maybe… | + | |
+ | Copy speed of data from a RAM Floppy to another RAM Floppy using PIP on a 10Mhz SBC V2 was measured as 21kbs. | ||
====== File List ====== | ====== File List ====== |