Table of Contents
ECB Mini-68k CPU Card
Current Version: 2.0-007
The Mini-M68K CPU board includes the following:
- The MC68008 CPU board is part of a 2 board system which will require the MultiFunction/PIC board. The 8-bit version 52-pin PLCC CPU is used, not the 48-pin DIP version. The latter addresses only 1Mb whereas the former addresses 4Mb.
- Memory on the CPU board itself is up to 2Mb SRAM: 4 x 512Kb chips.
- ROM on the board may be Flash memory or EPROM. For development, 128Kb Flash (AMD 29F010) would be appropriate. Chip sizes up to 512Kbytes are accomodated.
- Expanded memory in the form of the 4MEM board is provided for. This will allow up to 4Mb of additional paged memory.
- Interrupts are vectored using the Interrupt Controller on the MF/PIC board.
- The /NMI is designed to autovector. This gives a total of 9 possible interrupt sources.
- The UART and timers on the MF/PIC board use 3 of these interrupts.
- The ECB bus is used very much like the Z80 bus, except the address bus is expanded to 24 bits.
- M68K I/O is memory mapped to the 16-bit range: $3Fxxxx. To emulate a full MC68000, during I/O operations, the address bus is driven in the range: $FFxxxx.
- The memory range assignments are as follows:
- $00.0000 - $1F.FFFF SRAM (on-board)
- $20.0000 - $2F.FFFF 1M off-board (4MEM mapped memory)
- $30.0000 - $37.FFFF optional off-board range (jumper)
- $38.0000 - $3E.FFFF Flash/EPROM boot ROM
- $3F.0000 - $3F.FFFF I/O space (generates /IORQ instead of /MREQ)
- The CPU board uses an 8Mhz clock, and generates wait states as follows:
- RAM/ROM reads: 0 w.s.
- RAM writes: 0 or 1 w.s.
- I/O reads: 1 or 2 w.s.
- I/O writes: 2 or 3 w.s.
- The board is designed to support DMA access to on-board memory. However, there are no ECB boards at this time which use this feature.
- Memory protect hardware was added to the version 2 board. The protect feature, if enabled, allows only supervisor mode programs to write to memory below a set limit. Tests with the BIOS ROM posted on 28-Apr-2016 (see link below) indicate that the feature works with the BIOS and with CP/M of 26-Apr-2016 (part of the ROM image).
- J7, J8, J9, & J10 – all 'on' protects the lower 1K of interrupt vectors, and will cause a Bus Error (exception 2) on a write.
- J7 off; J8, J9, & J10 on – protects the low 4K (0x1000) of memory, which includes all of the BIOS variables. This appears to be the most protective setting that works.
- J7, J8 off; J9, J10 on – protects the low 64K or memory. This is too stringent for CP/M-68 programs to work, since many load at 0x1100 and appear to have variables allocated in this region.
- * If you use this memory protect feature, please report you successes and failures on the Forum. * JRC 01-May-2016
Manufacturing Files: ecb_mini68k-2.0-007-mfg.zip
KiCad Files: ecb_minim68k-007.zip
|ecb_mini68k-2.0-007-mfg.zip||152.5 KiB||2015/11/11 16:33|
|ecb_minim68k-007.zip||1.2 MiB||2015/11/11 16:31|
|mini-m68k-jumpers.txt||1.8 KiB||2016/05/01 15:10|
|mini-m68k-v2-parts_list.txt||3.6 KiB||2016/05/01 15:10|
|mini-m68k-v2-pc-component.png||78.7 KiB||2015/11/11 16:31|
|mini-m68k-v2-sch.pdf||435.4 KiB||2015/11/11 16:31|
|mini68k.jpg||3.2 MiB||2015/11/11 11:12|
|mini68k_sm.jpg||3.3 MiB||2015/11/11 11:11|
BIOS ROM images:
See the software:firmwareos:68000 page.