The graphics in this folder document the evolution of the RetroBrew ECB bus as it has expanded from the original SBC v1 (Z80) to the present usage. (ECB-06.jpg is the most current.)
The basis for the RetroBrew bus was the Kontron (a German firm) bus for the Z80 microprocessor. The signals on the original bus were Z80 specific and were confined to the A & C rows of pins on the 96-pin connector. Kontron defined a number of additional signals in planning for the bus to be expanded beyond the Z80 microprocessor. Additional signals included mainly VBAT, for battery backup power. Specifically absent from the RetroBrew bus are the +12v, -12v, +15v/12v, and -15v/-12v power supplies. RetroBrew by intent uses only +5v power. RS-232 voltage levels are obtained by using the voltage doubler / inverter in the MAX232 interface chip.
The first serious expansion of the RetroBrew ECB bus came with the SBC-188, a card utilizing the Intel 80C188 processor. The data bus remained 8-bit, but the address bus was expanded by 4 bits from 16 to 20 bits: B_A0 to B_A19. Other Intel signals, deemed to have future utility, were also defined. Most notable were: B_DT/R (data transmit / receive), B_/INTA (interrupt acknowledge), B_/DREQ (DMA request), and B_/DACK (DMA acknowledge).
The vectored interrupt lines were defined by the SBC v1, but never used until the introduction of the Multi-Function / Programmable Interrupt Controller (MF/PIC) board. This board, which can be programmed to operate with SBC v1, SBC v2, and the mini-M68000 CPU board, expands the interrupt capability of any processor to 8 prioritized interrupt requests. The CPU's which utilize the controller are able to vector the incoming interrupts. These input signals, /IR0 to /IR7, high to low priority, are on the B pin row.
The Motorola 68000 uses 24 address lines and 16 data lines. The Mini-M68k board uses a version of the 68000 with 8 data lines and only 22 address lines. However, in anticipation of a full 68000 CPU board, the mini-M68k defines the position of 4 additional address bits – and drives all of them: B_A20 to B_A23. There were a couple of different assignments of these address lines to pins, and the choice was made to keep the address bits on the A and C pin rows only. The future expansion of the data bus to 16-bits places D8 to D15 on the B row. Between ECB-03.jpg and ECB-04.jpg, the order of these data signals on the B row has been reversed to agree with existing Kontron documents. Likewise, signals /DS0 and /DS1 (Data Select) are added, and /SXTRQ and /SXTAK (sixteen bit Request / Acknowledge) have been added. Exact usage of the last two will probably be similar to S-100 usage, and for now, should be treated as "TBD."