Table of Contents
Next Generation Display & Keyboard (DSKYng)
Introduction
The DSKYng provides a low-level interface to the hardware on the RBC Z80 SBC (and others). This Intel 8279 based display and keyboard provides a simple to program buffered keyboard and display for simple tasks. It is supported by the monitor in RomWBW allowing the user can inspect/modify ports, inspect/modify memory, execute programs, or boot the system.
Special thanks to Andrew Lynch, Wayne Warthen, and John Coffman for their assistance with the design, development and testing of the DSKYng.
Hardware Documentation
BOARD | :boards:ecb:dskyng:nextgendsky_pcb.pdf |
SCHEMATIC | :boards:ecb:dskyng:nextgendsky_schematic.pdf |
GERBERS | :boards:ecb:dskyng:dskyng_gerber.zip |
KICAD SOURCE | :boards:ecb:dskyng:nextgendsky.zip |
The DSKYng provides two pass-through interfaces. The “IO” port is compatible with the original and V2 SBC parallel port and the “PPIDE” port is compatible with a PPIDE based port such as the one on the new SBC. Note that these cannot be used at the same time and are provided only to allow compatibility to as many of the SBC configurations as possible. Note that the DSKYng is compatible with an IDE based HDD or CF card running on the PPIDE bus or IO bus.
Power can be provided to the DSKYng through either the:
* PPIDE bus (jumper J9 Shorted)
* IO Bus (Jumper J1 1&2 Shorted)
* Directly with regulated 5v (Jumper J1, apply power to pins 2 & 3)
* Directly with unregulated 7-9V (unregulated power connector . . requires optional power regulator components)
When Attaching to the IO port Jumpers J10&11 need to be open, Jumper J5 needs to be jumpered to pins 2&3 and any software needs to be configured for an “Active Low” reset signal.
When Attaching to the PPIDE port Jumpers J10&11 need to be shorted, Jumper J5 needs to be jumpered to pins 1&2 and any software needs to be configured for an “Active High” reset signal.
Build Information
Parts List
ID | Quantity | Part Number | Notes |
---|---|---|---|
C1-9 | 9 | 0.1UF Unpolarized capacitor | |
C10 | 1 | 22uf radial Tantalum | Optional – only needed for unregulated power input |
C11 | 1 | 10uf radial electrolytic | Optional – only needed for unregulated power input |
D1-24 | 32 | 3.0mm LED | |
J1 | 1 | 2.54mm Pin Header 1×3 | |
J2 | 1 | Barrel Jack | Optional – only needed for unregulated power input |
J3-4 | 2 | 2.54mm Pin Header 2×13 | |
J5 | 1 | 2.54mm Pin Header 1×3 | |
J6 | 1 | 2.54mm Pin Header 2×12 | |
J7-8 | 2 | 2.54mm Pin Header 2×20 | |
J9 | 1 | 2.54mm Pin Header 1×2 | |
Q1-6,Q11-16,Q21-24 | 16 | Transistor 2N3904 | |
Q7-10,Q17-20 | 8 | Transistor 2N3906 | |
R1 | 1 | 10K Resistor | |
R2,R9-11,R18,21 | 8 | 22k Resistor | |
R3-8,R12-17,R24-27 | 16 | 330 ohm Resistor | |
SW1-30 | 30 | Cherry_MX Key Switch | any Cherry MX compatible keyswitch should work fine. |
U1,U5,U16 | 3 | 74ACT138 | |
U2 | 1 | 74LS00 | |
U3,U6 | 2 | 74ACT240 | |
U4 | 1 | intel 8279 | |
U7-U16 | 8 | Display 7 Segment, CC, HDSP-7503 | |
U15 | 1 | 74ACT244 | |
U17 | 1 | 7805 | Optional – only needed for unregulated power input |
X1 | 1 | Oscillator | 8279 can be configured to accept oscillators from 1 to 4Mhz |
BZ1 | 1 | Piezo beeper | Note that an “active” piezo buzzer is required.* |
*(a buzzer such as the one here https://www.amazon.com/TOTOT-Electromagnetic-Continuously-Electronic-Components/dp/B07GJSP68S/ref=sr_1_3?crid=EO44N9WO16OJ&dchild=1&keywords=active+piezo+buzzer&qid=1626196358&sprefix=active+piez%2Caps%2C192&sr=8-3 is appropriate)
Keycap Sourcing Notes
Because the key are not in a “normal” keyboard arrangement, some “compromises” need to be made. Keycaps with a consistent profile (like XDA,SA or DSA keys) need to be used otherwise the keys will have an uneven hight and angle. This effect is not too bad (the picture at the top of this wiki is using standard key caps) but it is noticeable in person. It is possible to find SA or DSA profile keycaps, but they are more expensive and usually need to be modified to allow the LED “shine through” effect for the back lighted keys. Several different sources for keycaps are being evaluated and the wiki will be updated with more information at a later time.
Reasonable priced SA (almost uniform) profile shine-through key caps: https://www.amazon.com/gp/product/B082PJ26CG/ref=ppx_yo_dt_b_asin_title_o01_s00?ie=UTF8&psc=1
low cost standard profile keys can be found here: https://flashquark.com/product-category/keycaps/oem-keys/mixable/|https://flashquark.com/product-category/keycaps/oem-keys/mixable/
low cost translucent keys can be found here, BUT these are not pre-printed: https://flashquark.com/product/translucent-dsa-keycaps/|https://flashquark.com/product/translucent-dsa-keycaps/
Software Documentation
Example code for using the DSKYng can be referenced from the RomWBW repo. Specifically /Source/HBIOS/dskyng.asm and /Source/Apps/tstdskng.asm will be useful in determining specifically how to write code for the DSKYng. The Intel 8279 datasheet :boards:ecb:dskyng:datasheet.pdf is also a useful reference for the registers and functions of the 8279 display and keyboard driver.
; LED SEGMENTS (BIT VALUES) ; ; +--01--+ ; 20 02 ; +--40--+ ; 10 04 ; +--08--+ 80 ; ; KEY CODE MAP (KEY CODES) --CCCRRR ; ; 00 08 10 18 23 ; 01 09 11 19 22 ; 02 0A 12 1A 21 ; 03 0B 13 1B 20 ; 04 0C 14 1C SHIFT ; 05 0D 15 1D CTRL ; ; LED BIT MAP (BIT VALUES) ; ; $08 $09 $0A $0B $0C $0D $0E $0F ; --- --- --- --- --- --- --- --- ; 01 01 01 01 01 ; 02 02 02 02 02 ; 04 04 04 04 04 ; 08 08 08 08 08 ; 10 10 10 10 10 ; 20 20 20 20 20 L1 L2 BUZZ ; PPIA .EQU DSKYPPIBASE + 0 ; PORT A PPIB .EQU DSKYPPIBASE + 1 ; PORT B PPIC .EQU DSKYPPIBASE + 2 ; PORT C PPIX .EQU DSKYPPIBASE + 3 ; PPI CONTROL PORT ; DSKY_PPIX_RD: .EQU %10010010 ; PPIX VALUE FOR READS DSKY_PPIX_WR: .EQU %10000010 ; PPIX VALUE FOR WRITES ; ; PIO CHANNEL C: ; ; 7 6 5 4 3 2 1 0 ; RES 0 0 CS CS /RD /WR A0 ; ; SETTING BITS 3 & 4 WILL ASSERT /CS ON 3279 ; CLEAR BITS 1 OR 2 TO ASSERT READ/WRITE ; DSKY_PPI_IDLE: .EQU %00000110 ; DSKY_CMD_CLR: .EQU %11011111 ; CLEAR (ALL OFF) DSKY_CMD_CLRX: .EQU %11010011 ; CLEAR (ALL ON) DSKY_CMD_WDSP: .EQU %10010000 ; WRITE DISPLAY RAM DSKY_CMD_RDSP: .EQU %01110000 ; READ DISPLAY RAM DSKY_CMD_CLK: .EQU %00100000 ; SET CLK PRESCALE DSKY_CMD_FIFO: .EQU %01000000 ; READ FIFO ; DSKY_PRESCL: .EQU DSKYOSC/100000 ; PRESCALER