Differences

This shows you the differences between two versions of the page.

--- boards:ecb:2s1p:start [2020/01/12 11:05]
rcini [Errata]
+++ boards:ecb:2s1p:start [2024/02/10 22:40] (current)
rcini [Resources]
@@ Line 5: / Line 5: @@
 {{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/boards/ecb/2s1p/ecb_2s1p_001.png?nolink&800x484|ECB 2S1P Board Plot}}
-====== 2S1P - Dual Serial/Single EPP Parallel Interface ======
+{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/boards/ecb/2s1p/img_6854.jpg?nolink&800x1067|EBC 2S1P board as-built.}}
-The ECB 2S1P (or SPP for short) board provides two RS-232 level serial interfaces and a single PC/AT-compatible Centronics parallel port using the Texas Instruments TL16C552 multiport interface chip.
-{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/boards/ecb/2s1p/ecb_2s1p_001.png?nolink&800x484|ECB 2S1P Board Plot}}
 ===== Overview =====
@@ Line 17: / Line 13: @@
 The board was developed primarily for and tested for use with the SBC-188 80C188-based processor board, but it should work with other boards. The SBC-188 BIOS has been modified to enable MS-DOS to use this board as standard COM/LPT ports (albeit at non-standard port addresses).
-As a point of note, the board is NOT compatible with the ST
+As a point of note, the board is NOT compatible with the ST16C552 due to a different pin arrangement.
-===== Errata =====
+===== Construction Notes =====
-None in version 1.0-001 (the first production run).
+==== Resistor Arrays ====
-===== Resources =====
+The resistor arrays (RN501, RN502) that are part of the RC damper circuit for the parallel port are __isolated__ resistors, not the more common bussed resistor arrays that most builders have in stock. They are also an uncommon value (27 ohms) for your typical RetroBrew build. The schematic shows this difference, but if you go straight by the BOM, that difference isn't clear.
-^Filename^Size^Updated|
+==== Jumpers ====
-|{{:boards:ecb:2s1p:ecb_2s1p-1.0-001_sch.pdf|ECB 2S1P-1.0-001_sch.pdf}} |724Kb|2019-12-27|
-|{{:boards:ecb:2s1p:ecb_2s1p-1.0-001_pcb.pdf|ECB 2S1P-1.0-001_pcb.pdf}} |500Kb|2019-12-27|
-|{{:boards:ecb:2s1p:ecb_2s1p-1.0-001.zip|ECB 2S1P-1.0-001_design.zip}} |2.1Mb|2020-01-12|
-\\
+AT/EPP: this jumper controls the parallel port mode supported by the 16C552. For use with DOS, I leave it in the most-compatible AT mode.
+DCE/DTE: these jumpers (one for each port) controls whether the port acts as a terminal (DTE) or a modem (DCE); effectively a chip-controlled null-modem switch.
-===== Overview =====
+RTS/DTR: these jumpers select which handshaking signal appears at the TTL-level 6-pin header.
-The ECB 2S1P board provides two 8250/16C550 similar serial interfaces (which is clocked at 1.8432mhz to provide common baud rates from 300 to 115,200) and a single PC/AT-EPP compatible parallel printer port using the TL16C552B PLCC chip and related level shifters. Two TTL-level headers are provoded for those wanting to use USB TTL interfaces directly.
+INT/NMI: these jumpers control which interupt line the respective port is mapped to; unused with the current drivers, so leave open.
-The board was developed primarily for and tested for use with the SBC-188 80C188-based processor board, but it should work with other boards. The SBC-188 BIOS has been modified to enable MS-DOS to use this board as standard COM/LPT ports (albeit at non-standard port addresses).
+BRD_SEL: this jumper controls which ECB port range the board is assigned to. For the SBC-188, this is offset by 0x400 in software (so, Cx = $4Cx) due to how off-board ports are mapped by the SBC-188 card.
-As a point of note, the board is NOT compatible with the ST16C552 due to a different pin arrangement.
 ===== Errata =====
-None in version 1.0-001 (the first production run).
+Version 1.0-001: A small silkscreen error was found (11/6/2022) -- the COM1 and LPT designators above P302 and P303 should be swapped. There is no impact to operations from this error.
+===== Software =====
+The UAR/T used is a derivative of the Intel 8251 UAR/T so most basic code will run without significant modification. To use with MS-DOS on the SBC-188, TSR (terminate and stay resident) drivers are required to provide replacement BIOS functions (none of the BIOSes, including the latest BIOS-050, do not have any code to support the board). Additionally, most DOS programs assume that the serial and parallel ports live at specific I/O port addresses and are interrupt-capable. On versions of the SBC-188 prior to version 3, the interrupt system doesn't conveniently allow for interrupt-driven serial ports such as the 2S1P, so the 2S1P has to be run in "polled" mode. It's expected that version 3 of the SBC-188 will have a usable/trappable interrupt that can be connected to the 2S1P to allow for most software to work; the I/O port and interrupt selection allocation will still be an issue but that's easier to deal with.
+The software should be considered "beta" quality.
 ===== Resources =====
@@ Line 53: / Line 50: @@
 |{{:boards:ecb:2s1p:ecb_2s1p-1.0-001_pcb.pdf|ECB 2S1P-1.0-001_pcb.pdf}} |500Kb|2019-12-27|
 |{{:boards:ecb:2s1p:ecb_2s1p-1.0-001.zip|ECB 2S1P-1.0-001_design.zip}} |2.1Mb|2020-01-12|
+|{{:boards:ecb:2s1p:ecb_driver_rel01.zip|ECB 2S1P_driver_rel01.zip}} |39Kb|2020-01-17|
-\\
+===== Software =====
+The UAR/T used is a derivative of the Intel 8251 UAR/T so most basic code will run without significant modification. To use with MS-DOS on the SBC-188, TSR (terminate and stay resident) drivers are required to provide replacement BIOS functions (none of the BIOSes, including the latest BIOS-050, do not have any code to support the board). Additionally, most DOS programs assume that the serial and parallel ports live at specific I/O port addresses and are interrupt-capable. On versions of the SBC-188 prior to version 3, the interrupt system doesn't conveniently allow for interrupt-driven serial ports such as the 2S1P, so the 2S1P has to be run in "polled" mode. It's expected that version 3 of the SBC-188 will have a usable/trappable interrupt that can be connected to the 2S1P to allow for most software to work; the I/O port and interrupt selection allocation will still be an issue but that's easier to deal with.
+The software should be considered "beta" quality.
+===== Resources =====
+^Filename^Size^Updated|
+|{{:boards:ecb:2s1p:ecb_2s1p-1.0-001_sch.pdf|ECB 2S1P-1.0-001_sch.pdf}} |724Kb|2019-12-27|
+|{{:boards:ecb:2s1p:ecb_2s1p-1.0-001_pcb.pdf|ECB 2S1P-1.0-001_pcb.pdf}} |500Kb|2019-12-27|
+|{{:boards:ecb:2s1p:ecb_2s1p-1.0-001.zip|ECB 2S1P-1.0-001_design.zip}} |2.1Mb|2020-01-12|
+|{{:boards:ecb:2s1p:ecb_driver_rel01.zip|ECB 2S1P_driver_rel01.zip}} |39Kb|2020-01-17|