Rev0 KIORC Engineering Change for 32x16KB banks

This engineering change is needed to convert rev0 KIORC pc board to emulate memory bank scheme of RC2014 512K RAM/ROM board

• 5K pullup resistor for channel B receive; VCC to one terminal of 5K resistor, pin 3 of channel B serial connector to other terminal.
• RTS handshake to channel A; RTSA (KIO pin 29) to pin 1 of channel A serial connector.
• RTS handshake to channel B; RTSB (KIO pin 14) to pin 1 of channel B serial connector
• KIO clock out connect to Channel A & B transmit and receive clocks and Clock 1 and 2 trigger inputs; KIO clock out is already connected to Channel A & B transmit and receive clock. Clock 1 and 2 trigger inputs are pin 73 and 74 of KIO which is connected to pin 4 (TXCB) of KIO.
• KIO's ASTA and ASTB need to be pulled up; connect KIO pin 61 (VCC) to one terminal of 4.7K resistor, connect the other terminal of the resistor to pin 44 and 46 of KIO
• Ground KIO's DCDA and DCDB, pull down KIO's CTSA and CTSB; connect KIO pin 10 (GND) to KIO pin 8(DCDA), pin 7(DCDB); solder 0603 1K resistors between pin 6 and pin 8 of KIO and again between pin 7 and pin 9 of KIO thus pulling CTSA and CTSB to ground through 1K resistors.