The prototyper board allows users to add their own custom hardware to their RBC system. Designed for a Z80 based system (Z80-SBC or N8) it has buffered address, data and control lines brought out to a 37×2 header on the edge of a large prototyping area. The board can be addressed in memory or I/O space and supports interrupt daisy chaining. There is a 74LS138 that can provide eight decoded I/O chip select lines. It could be used the SBC-188 if the interrupt circuitry is not installed.
This board is based on an article published in the C'T Projekt section of the German C'T Magazine. The original article can be found here.
Current Version: “002”
Manufacturing Files: Gerber files were not on old wiki
The board is configured by adding jumpers to three headers. P13 determines the I/O block size. P14 determines the I/O block start address and P15 has options for the data buffer, interrupts and 74LS138 I/O decoder. P13 and P14 control the 74LS688 8-bit comparator U6.
P11 and P12 make up a 37×2 header carrying all the buffered signal lines and many signal lines from the ECB connector.
In the photo, P13 has the block of four blue jumpers. They select which address lines out of (from left to right) A0 to A7 will be used by the 74LS688 comparator to determine the block size. In the photo a block size of 16 I/O addresses is selected by jumpering A4 to A7. For a block size of 8 add another jumper to A3, for 32 remove the jumper on A4. The white jumper allows /M1 to control U6, the green jumper selects between /IORQ or /MREQ. /IORQ is used in the photo.
In the photo, P14 has the two red jumpers selecting A4 and A5. Any jumper selects when its address is LO. The start address in the example is C0h (A7=1, A6=1, A5=0 and A4=0).
P15 is the header at the bottom right of the photo. The top six pins (40-45 in the schematic) determine how U1 the 74LS245 data transceiver will operate. In the photo the jumper on pins 40-42 allows bi-directional data. The jumper on pins 43-45 allows U1 to activate whenever the I/O block is selected. Jumpering 41-43 would activate U1 all the time.The next four pins (46-49) are used with the interrupt circuitry. The rest of P15 controls U7 the 74LS138 I/O decoder. Only lines A0 to A3 are provided for the decoding making it useful for a block size up to 16. In the photo it selects four groups of four addresses i.e. C0h-C3h, C4h-C7h, C8h-CBh, CCh-CFh.