====== The following information described details of previous versions ======

===== Version 1 =====

In version 1 the Zilog peripheral board header layouts are different to the other boards in the ECB and are shown below. Custom cables must be made. For example - the Z80-DART/SIO doesn't provide a DSR input so it uses DCD instead. Ring Indicator is also not used.

Version 2 aligns the board with standard IBM PC standard.

|   \\ X3 / X7 pin|   \\ Signal|   \\ DB-9M|   \\ DB-9F|   \\ Note|
|   \\ 1|   \\ GND|   \\ 5|   \\ 5|   |
|   \\ 2|   \\ GND|   \\ 5|   \\ 5|   |
|   \\ 3|   \\ /Tx out|   \\ 3|   \\ 2|   |
|   \\ 4|   \\ DCD in|   \\ 6 / 1|   \\ 4|   |
|   \\ 5|   \\ /Rx in|   \\ 2|   \\ 3|   |
|   \\ 6|   \\ DTR out|   \\ 4|   \\ 6 / 1|   |
|   \\ 7|   \\ RST out|   \\ 7|   \\ 8|   |
|   \\ 8|   \\ n/c|   \\ n/c|   \\ n/c|   |
|   \\ 9|   \\ CTS in|   \\ 8|   \\ 7|   |
|   \\ 10|   \\ n/c|   \\ n/c|   \\ n/c|   |

==== Schematics ====

{{:boards:ecb:zilog-peripherals:v1:zilog_peripherals-schematic.pdf|:boards:ecb:zilog-peripherals:v1:zilog_peripherals-schematic.pdf}}

==== Board Layout ====

{{:boards:ecb:zilog-peripherals:v1:zilog_peripherals-full-board.pdf|:boards:ecb:zilog-peripherals:v1:zilog_peripherals-full-board.pdf}}

==== KiCad Files ====

{{:boards:ecb:zilog-peripherals:v1:ecb_zilog_peripherals.zip|:boards:ecb:zilog-peripherals:v1:ecb_zilog_peripherals.zip}}

==== PCB Gerber files ====

{{:boards:ecb:zilog-peripherals:v1:ecb_zilog_peripherals_gerbers.zip|:boards:ecb:zilog-peripherals:v1:ecb_zilog_peripherals_gerbers.zip}}

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